96 lines
2.2 KiB
C
96 lines
2.2 KiB
C
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/*
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* Toshiba RBTX4939 interrupt routines
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* Based on linux/arch/mips/txx9/rbtx4938/irq.c,
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* and RBTX49xx patch from CELF patch archive.
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*
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* Copyright (C) 2000-2001,2005-2006 Toshiba Corporation
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* 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
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* terms of the GNU General Public License version 2. This program is
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* licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <asm/mipsregs.h>
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#include <asm/txx9/rbtx4939.h>
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/*
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* RBTX4939 IOC controller definition
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*/
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static void rbtx4939_ioc_irq_unmask(struct irq_data *d)
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{
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int ioc_nr = d->irq - RBTX4939_IRQ_IOC;
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writeb(readb(rbtx4939_ien_addr) | (1 << ioc_nr), rbtx4939_ien_addr);
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}
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static void rbtx4939_ioc_irq_mask(struct irq_data *d)
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{
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int ioc_nr = d->irq - RBTX4939_IRQ_IOC;
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writeb(readb(rbtx4939_ien_addr) & ~(1 << ioc_nr), rbtx4939_ien_addr);
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mmiowb();
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}
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static struct irq_chip rbtx4939_ioc_irq_chip = {
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.name = "IOC",
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.irq_mask = rbtx4939_ioc_irq_mask,
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.irq_unmask = rbtx4939_ioc_irq_unmask,
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};
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static inline int rbtx4939_ioc_irqroute(void)
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{
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unsigned char istat = readb(rbtx4939_ifac2_addr);
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if (unlikely(istat == 0))
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return -1;
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return RBTX4939_IRQ_IOC + __fls8(istat);
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}
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static int rbtx4939_irq_dispatch(int pending)
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{
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int irq;
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if (pending & CAUSEF_IP7)
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return MIPS_CPU_IRQ_BASE + 7;
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irq = tx4939_irq();
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if (likely(irq >= 0)) {
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/* redirect IOC interrupts */
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switch (irq) {
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case RBTX4939_IRQ_IOCINT:
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irq = rbtx4939_ioc_irqroute();
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break;
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}
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} else if (pending & CAUSEF_IP0)
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irq = MIPS_CPU_IRQ_BASE + 0;
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else if (pending & CAUSEF_IP1)
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irq = MIPS_CPU_IRQ_BASE + 1;
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else
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irq = -1;
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return irq;
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}
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void __init rbtx4939_irq_setup(void)
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{
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int i;
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/* mask all IOC interrupts */
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writeb(0, rbtx4939_ien_addr);
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/* clear SoftInt interrupts */
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writeb(0, rbtx4939_softint_addr);
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txx9_irq_dispatch = rbtx4939_irq_dispatch;
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tx4939_irq_init();
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for (i = RBTX4939_IRQ_IOC;
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i < RBTX4939_IRQ_IOC + RBTX4939_NR_IRQ_IOC; i++)
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irq_set_chip_and_handler(i, &rbtx4939_ioc_irq_chip,
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handle_level_irq);
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irq_set_chained_handler(RBTX4939_IRQ_IOCINT, handle_simple_irq);
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}
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