456 lines
11 KiB
C
456 lines
11 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* linux/include/asm-m68k/raw_io.h
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*
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* 10/20/00 RZ: - created from bits of io.h and ide.h to cleanup namespace
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*
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*/
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#ifndef _RAW_IO_H
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#define _RAW_IO_H
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#ifdef __KERNEL__
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#include <asm/byteorder.h>
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/* Values for nocacheflag and cmode */
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#define IOMAP_FULL_CACHING 0
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#define IOMAP_NOCACHE_SER 1
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#define IOMAP_NOCACHE_NONSER 2
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#define IOMAP_WRITETHROUGH 3
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extern void iounmap(void __iomem *addr);
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extern void __iomem *__ioremap(unsigned long physaddr, unsigned long size,
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int cacheflag);
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extern void __iounmap(void *addr, unsigned long size);
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/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
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* two accesses to memory, which may be undesirable for some devices.
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*/
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#define in_8(addr) \
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({ u8 __v = (*(__force volatile u8 *) (addr)); __v; })
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#define in_be16(addr) \
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({ u16 __v = (*(__force volatile u16 *) (addr)); __v; })
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#define in_be32(addr) \
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({ u32 __v = (*(__force volatile u32 *) (addr)); __v; })
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#define in_le16(addr) \
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({ u16 __v = le16_to_cpu(*(__force volatile __le16 *) (addr)); __v; })
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#define in_le32(addr) \
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({ u32 __v = le32_to_cpu(*(__force volatile __le32 *) (addr)); __v; })
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#define out_8(addr,b) (void)((*(__force volatile u8 *) (addr)) = (b))
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#define out_be16(addr,w) (void)((*(__force volatile u16 *) (addr)) = (w))
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#define out_be32(addr,l) (void)((*(__force volatile u32 *) (addr)) = (l))
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#define out_le16(addr,w) (void)((*(__force volatile __le16 *) (addr)) = cpu_to_le16(w))
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#define out_le32(addr,l) (void)((*(__force volatile __le32 *) (addr)) = cpu_to_le32(l))
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#define raw_inb in_8
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#define raw_inw in_be16
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#define raw_inl in_be32
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#define __raw_readb in_8
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#define __raw_readw in_be16
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#define __raw_readl in_be32
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#define raw_outb(val,port) out_8((port),(val))
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#define raw_outw(val,port) out_be16((port),(val))
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#define raw_outl(val,port) out_be32((port),(val))
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#define __raw_writeb(val,addr) out_8((addr),(val))
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#define __raw_writew(val,addr) out_be16((addr),(val))
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#define __raw_writel(val,addr) out_be32((addr),(val))
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/*
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* Atari ROM port (cartridge port) ISA adapter, used for the EtherNEC NE2000
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* network card driver.
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* The ISA adapter connects address lines A9-A13 to ISA address lines A0-A4,
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* and hardwires the rest of the ISA addresses for a base address of 0x300.
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*
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* Data lines D8-D15 are connected to ISA data lines D0-D7 for reading.
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* For writes, address lines A1-A8 are latched to ISA data lines D0-D7
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* (meaning the bit pattern on A1-A8 can be read back as byte).
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*
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* Read and write operations are distinguished by the base address used:
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* reads are from the ROM A side range, writes are through the B side range
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* addresses (A side base + 0x10000).
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*
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* Reads and writes are byte only.
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*
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* 16 bit reads and writes are necessary for the NetUSBee adapter's USB
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* chipset - 16 bit words are read straight off the ROM port while 16 bit
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* reads are split into two byte writes. The low byte is latched to the
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* NetUSBee buffer by a read from the _read_ window (with the data pattern
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* asserted as A1-A8 address pattern). The high byte is then written to the
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* write range as usual, completing the write cycle.
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*/
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#if defined(CONFIG_ATARI_ROM_ISA)
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#define rom_in_8(addr) \
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({ u16 __v = (*(__force volatile u16 *) (addr)); __v >>= 8; __v; })
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#define rom_in_be16(addr) \
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({ u16 __v = (*(__force volatile u16 *) (addr)); __v; })
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#define rom_in_le16(addr) \
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({ u16 __v = le16_to_cpu(*(__force volatile u16 *) (addr)); __v; })
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#define rom_out_8(addr, b) \
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({u8 __w, __v = (b); u32 _addr = ((u32) (addr)); \
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__w = ((*(__force volatile u8 *) ((_addr | 0x10000) + (__v<<1)))); })
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#define rom_out_be16(addr, w) \
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({u16 __w, __v = (w); u32 _addr = ((u32) (addr)); \
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__w = ((*(__force volatile u16 *) ((_addr & 0xFFFF0000UL) + ((__v & 0xFF)<<1)))); \
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__w = ((*(__force volatile u16 *) ((_addr | 0x10000) + ((__v >> 8)<<1)))); })
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#define rom_out_le16(addr, w) \
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({u16 __w, __v = (w); u32 _addr = ((u32) (addr)); \
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__w = ((*(__force volatile u16 *) ((_addr & 0xFFFF0000UL) + ((__v >> 8)<<1)))); \
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__w = ((*(__force volatile u16 *) ((_addr | 0x10000) + ((__v & 0xFF)<<1)))); })
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#define raw_rom_inb rom_in_8
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#define raw_rom_inw rom_in_be16
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#define raw_rom_outb(val, port) rom_out_8((port), (val))
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#define raw_rom_outw(val, port) rom_out_be16((port), (val))
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#endif /* CONFIG_ATARI_ROM_ISA */
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static inline void raw_insb(volatile u8 __iomem *port, u8 *buf, unsigned int len)
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{
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unsigned int i;
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for (i = 0; i < len; i++)
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*buf++ = in_8(port);
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}
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static inline void raw_outsb(volatile u8 __iomem *port, const u8 *buf,
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unsigned int len)
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{
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unsigned int i;
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for (i = 0; i < len; i++)
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out_8(port, *buf++);
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}
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static inline void raw_insw(volatile u16 __iomem *port, u16 *buf, unsigned int nr)
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{
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unsigned int tmp;
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if (nr & 15) {
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tmp = (nr & 15) - 1;
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asm volatile (
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"1: movew %2@,%0@+; dbra %1,1b"
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: "=a" (buf), "=d" (tmp)
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: "a" (port), "0" (buf),
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"1" (tmp));
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}
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if (nr >> 4) {
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tmp = (nr >> 4) - 1;
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asm volatile (
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"1: "
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"movew %2@,%0@+; "
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"movew %2@,%0@+; "
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"movew %2@,%0@+; "
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"movew %2@,%0@+; "
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"movew %2@,%0@+; "
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"movew %2@,%0@+; "
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"movew %2@,%0@+; "
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"movew %2@,%0@+; "
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"movew %2@,%0@+; "
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"movew %2@,%0@+; "
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"movew %2@,%0@+; "
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"movew %2@,%0@+; "
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"movew %2@,%0@+; "
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"movew %2@,%0@+; "
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"movew %2@,%0@+; "
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"movew %2@,%0@+; "
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"dbra %1,1b"
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: "=a" (buf), "=d" (tmp)
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: "a" (port), "0" (buf),
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"1" (tmp));
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}
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}
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static inline void raw_outsw(volatile u16 __iomem *port, const u16 *buf,
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unsigned int nr)
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{
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unsigned int tmp;
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if (nr & 15) {
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tmp = (nr & 15) - 1;
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asm volatile (
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"1: movew %0@+,%2@; dbra %1,1b"
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: "=a" (buf), "=d" (tmp)
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: "a" (port), "0" (buf),
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"1" (tmp));
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}
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if (nr >> 4) {
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tmp = (nr >> 4) - 1;
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asm volatile (
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"1: "
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"movew %0@+,%2@; "
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"movew %0@+,%2@; "
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"movew %0@+,%2@; "
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"movew %0@+,%2@; "
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"movew %0@+,%2@; "
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"movew %0@+,%2@; "
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"movew %0@+,%2@; "
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"movew %0@+,%2@; "
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"movew %0@+,%2@; "
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"movew %0@+,%2@; "
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"movew %0@+,%2@; "
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"movew %0@+,%2@; "
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"movew %0@+,%2@; "
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"movew %0@+,%2@; "
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"movew %0@+,%2@; "
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"movew %0@+,%2@; "
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"dbra %1,1b"
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: "=a" (buf), "=d" (tmp)
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: "a" (port), "0" (buf),
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"1" (tmp));
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}
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}
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static inline void raw_insl(volatile u32 __iomem *port, u32 *buf, unsigned int nr)
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{
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unsigned int tmp;
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if (nr & 15) {
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tmp = (nr & 15) - 1;
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asm volatile (
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"1: movel %2@,%0@+; dbra %1,1b"
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: "=a" (buf), "=d" (tmp)
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: "a" (port), "0" (buf),
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"1" (tmp));
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}
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if (nr >> 4) {
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tmp = (nr >> 4) - 1;
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asm volatile (
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"1: "
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"movel %2@,%0@+; "
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"movel %2@,%0@+; "
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"movel %2@,%0@+; "
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"movel %2@,%0@+; "
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"movel %2@,%0@+; "
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"movel %2@,%0@+; "
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"movel %2@,%0@+; "
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"movel %2@,%0@+; "
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"movel %2@,%0@+; "
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"movel %2@,%0@+; "
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"movel %2@,%0@+; "
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"movel %2@,%0@+; "
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"movel %2@,%0@+; "
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"movel %2@,%0@+; "
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"movel %2@,%0@+; "
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"movel %2@,%0@+; "
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"dbra %1,1b"
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: "=a" (buf), "=d" (tmp)
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: "a" (port), "0" (buf),
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"1" (tmp));
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}
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}
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static inline void raw_outsl(volatile u32 __iomem *port, const u32 *buf,
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unsigned int nr)
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{
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unsigned int tmp;
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if (nr & 15) {
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tmp = (nr & 15) - 1;
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asm volatile (
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"1: movel %0@+,%2@; dbra %1,1b"
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: "=a" (buf), "=d" (tmp)
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: "a" (port), "0" (buf),
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"1" (tmp));
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}
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if (nr >> 4) {
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tmp = (nr >> 4) - 1;
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asm volatile (
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"1: "
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"movel %0@+,%2@; "
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"movel %0@+,%2@; "
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"movel %0@+,%2@; "
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"movel %0@+,%2@; "
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"movel %0@+,%2@; "
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"movel %0@+,%2@; "
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"movel %0@+,%2@; "
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"movel %0@+,%2@; "
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"movel %0@+,%2@; "
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"movel %0@+,%2@; "
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"movel %0@+,%2@; "
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"movel %0@+,%2@; "
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"movel %0@+,%2@; "
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"movel %0@+,%2@; "
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"movel %0@+,%2@; "
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"movel %0@+,%2@; "
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"dbra %1,1b"
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: "=a" (buf), "=d" (tmp)
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: "a" (port), "0" (buf),
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"1" (tmp));
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}
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}
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static inline void raw_insw_swapw(volatile u16 __iomem *port, u16 *buf,
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unsigned int nr)
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{
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if ((nr) % 8)
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__asm__ __volatile__
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("\tmovel %0,%/a0\n\t"
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"movel %1,%/a1\n\t"
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"movel %2,%/d6\n\t"
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"subql #1,%/d6\n"
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"1:\tmovew %/a0@,%/d0\n\t"
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"rolw #8,%/d0\n\t"
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"movew %/d0,%/a1@+\n\t"
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"dbra %/d6,1b"
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:
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: "g" (port), "g" (buf), "g" (nr)
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: "d0", "a0", "a1", "d6");
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else
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__asm__ __volatile__
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("movel %0,%/a0\n\t"
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"movel %1,%/a1\n\t"
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"movel %2,%/d6\n\t"
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"lsrl #3,%/d6\n\t"
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"subql #1,%/d6\n"
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"1:\tmovew %/a0@,%/d0\n\t"
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"rolw #8,%/d0\n\t"
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"movew %/d0,%/a1@+\n\t"
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"movew %/a0@,%/d0\n\t"
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"rolw #8,%/d0\n\t"
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"movew %/d0,%/a1@+\n\t"
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"movew %/a0@,%/d0\n\t"
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"rolw #8,%/d0\n\t"
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"movew %/d0,%/a1@+\n\t"
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"movew %/a0@,%/d0\n\t"
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"rolw #8,%/d0\n\t"
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"movew %/d0,%/a1@+\n\t"
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"movew %/a0@,%/d0\n\t"
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"rolw #8,%/d0\n\t"
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"movew %/d0,%/a1@+\n\t"
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"movew %/a0@,%/d0\n\t"
|
||
|
|
"rolw #8,%/d0\n\t"
|
||
|
|
"movew %/d0,%/a1@+\n\t"
|
||
|
|
"movew %/a0@,%/d0\n\t"
|
||
|
|
"rolw #8,%/d0\n\t"
|
||
|
|
"movew %/d0,%/a1@+\n\t"
|
||
|
|
"movew %/a0@,%/d0\n\t"
|
||
|
|
"rolw #8,%/d0\n\t"
|
||
|
|
"movew %/d0,%/a1@+\n\t"
|
||
|
|
"dbra %/d6,1b"
|
||
|
|
:
|
||
|
|
: "g" (port), "g" (buf), "g" (nr)
|
||
|
|
: "d0", "a0", "a1", "d6");
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline void raw_outsw_swapw(volatile u16 __iomem *port, const u16 *buf,
|
||
|
|
unsigned int nr)
|
||
|
|
{
|
||
|
|
if ((nr) % 8)
|
||
|
|
__asm__ __volatile__
|
||
|
|
("movel %0,%/a0\n\t"
|
||
|
|
"movel %1,%/a1\n\t"
|
||
|
|
"movel %2,%/d6\n\t"
|
||
|
|
"subql #1,%/d6\n"
|
||
|
|
"1:\tmovew %/a1@+,%/d0\n\t"
|
||
|
|
"rolw #8,%/d0\n\t"
|
||
|
|
"movew %/d0,%/a0@\n\t"
|
||
|
|
"dbra %/d6,1b"
|
||
|
|
:
|
||
|
|
: "g" (port), "g" (buf), "g" (nr)
|
||
|
|
: "d0", "a0", "a1", "d6");
|
||
|
|
else
|
||
|
|
__asm__ __volatile__
|
||
|
|
("movel %0,%/a0\n\t"
|
||
|
|
"movel %1,%/a1\n\t"
|
||
|
|
"movel %2,%/d6\n\t"
|
||
|
|
"lsrl #3,%/d6\n\t"
|
||
|
|
"subql #1,%/d6\n"
|
||
|
|
"1:\tmovew %/a1@+,%/d0\n\t"
|
||
|
|
"rolw #8,%/d0\n\t"
|
||
|
|
"movew %/d0,%/a0@\n\t"
|
||
|
|
"movew %/a1@+,%/d0\n\t"
|
||
|
|
"rolw #8,%/d0\n\t"
|
||
|
|
"movew %/d0,%/a0@\n\t"
|
||
|
|
"movew %/a1@+,%/d0\n\t"
|
||
|
|
"rolw #8,%/d0\n\t"
|
||
|
|
"movew %/d0,%/a0@\n\t"
|
||
|
|
"movew %/a1@+,%/d0\n\t"
|
||
|
|
"rolw #8,%/d0\n\t"
|
||
|
|
"movew %/d0,%/a0@\n\t"
|
||
|
|
"movew %/a1@+,%/d0\n\t"
|
||
|
|
"rolw #8,%/d0\n\t"
|
||
|
|
"movew %/d0,%/a0@\n\t"
|
||
|
|
"movew %/a1@+,%/d0\n\t"
|
||
|
|
"rolw #8,%/d0\n\t"
|
||
|
|
"movew %/d0,%/a0@\n\t"
|
||
|
|
"movew %/a1@+,%/d0\n\t"
|
||
|
|
"rolw #8,%/d0\n\t"
|
||
|
|
"movew %/d0,%/a0@\n\t"
|
||
|
|
"movew %/a1@+,%/d0\n\t"
|
||
|
|
"rolw #8,%/d0\n\t"
|
||
|
|
"movew %/d0,%/a0@\n\t"
|
||
|
|
"dbra %/d6,1b"
|
||
|
|
:
|
||
|
|
: "g" (port), "g" (buf), "g" (nr)
|
||
|
|
: "d0", "a0", "a1", "d6");
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
#if defined(CONFIG_ATARI_ROM_ISA)
|
||
|
|
static inline void raw_rom_insb(volatile u8 __iomem *port, u8 *buf, unsigned int len)
|
||
|
|
{
|
||
|
|
unsigned int i;
|
||
|
|
|
||
|
|
for (i = 0; i < len; i++)
|
||
|
|
*buf++ = rom_in_8(port);
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline void raw_rom_outsb(volatile u8 __iomem *port, const u8 *buf,
|
||
|
|
unsigned int len)
|
||
|
|
{
|
||
|
|
unsigned int i;
|
||
|
|
|
||
|
|
for (i = 0; i < len; i++)
|
||
|
|
rom_out_8(port, *buf++);
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline void raw_rom_insw(volatile u16 __iomem *port, u16 *buf,
|
||
|
|
unsigned int nr)
|
||
|
|
{
|
||
|
|
unsigned int i;
|
||
|
|
|
||
|
|
for (i = 0; i < nr; i++)
|
||
|
|
*buf++ = rom_in_be16(port);
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline void raw_rom_outsw(volatile u16 __iomem *port, const u16 *buf,
|
||
|
|
unsigned int nr)
|
||
|
|
{
|
||
|
|
unsigned int i;
|
||
|
|
|
||
|
|
for (i = 0; i < nr; i++)
|
||
|
|
rom_out_be16(port, *buf++);
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline void raw_rom_insw_swapw(volatile u16 __iomem *port, u16 *buf,
|
||
|
|
unsigned int nr)
|
||
|
|
{
|
||
|
|
unsigned int i;
|
||
|
|
|
||
|
|
for (i = 0; i < nr; i++)
|
||
|
|
*buf++ = rom_in_le16(port);
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline void raw_rom_outsw_swapw(volatile u16 __iomem *port, const u16 *buf,
|
||
|
|
unsigned int nr)
|
||
|
|
{
|
||
|
|
unsigned int i;
|
||
|
|
|
||
|
|
for (i = 0; i < nr; i++)
|
||
|
|
rom_out_le16(port, *buf++);
|
||
|
|
}
|
||
|
|
#endif /* CONFIG_ATARI_ROM_ISA */
|
||
|
|
|
||
|
|
#endif /* __KERNEL__ */
|
||
|
|
|
||
|
|
#endif /* _RAW_IO_H */
|