528 lines
16 KiB
C
528 lines
16 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* linux/include/asm-m68k/io.h
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*
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* 4/1/00 RZ: - rewritten to avoid clashes between ISA/PCI and other
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* IO access
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* - added Q40 support
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* - added skeleton for GG-II and Amiga PCMCIA
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* 2/3/01 RZ: - moved a few more defs into raw_io.h
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*
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* inX/outX should not be used by any driver unless it does
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* ISA access. Other drivers should use function defined in raw_io.h
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* or define its own macros on top of these.
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*
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* inX(),outX() are for ISA I/O
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* isa_readX(),isa_writeX() are for ISA memory
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*/
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#ifndef _IO_H
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#define _IO_H
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#ifdef __KERNEL__
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#define ARCH_HAS_IOREMAP_WT
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#include <linux/compiler.h>
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#include <asm/raw_io.h>
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#include <asm/virtconvert.h>
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#include <asm-generic/iomap.h>
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#ifdef CONFIG_ATARI
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#include <asm/atarihw.h>
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#endif
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/*
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* IO/MEM definitions for various ISA bridges
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*/
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#ifdef CONFIG_Q40
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#define q40_isa_io_base 0xff400000
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#define q40_isa_mem_base 0xff800000
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#define Q40_ISA_IO_B(ioaddr) (q40_isa_io_base+1+4*((unsigned long)(ioaddr)))
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#define Q40_ISA_IO_W(ioaddr) (q40_isa_io_base+ 4*((unsigned long)(ioaddr)))
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#define Q40_ISA_MEM_B(madr) (q40_isa_mem_base+1+4*((unsigned long)(madr)))
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#define Q40_ISA_MEM_W(madr) (q40_isa_mem_base+ 4*((unsigned long)(madr)))
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#define MULTI_ISA 0
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#endif /* Q40 */
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#ifdef CONFIG_AMIGA_PCMCIA
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#include <asm/amigayle.h>
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#define AG_ISA_IO_B(ioaddr) ( GAYLE_IO+(ioaddr)+(((ioaddr)&1)*GAYLE_ODD) )
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#define AG_ISA_IO_W(ioaddr) ( GAYLE_IO+(ioaddr) )
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#ifndef MULTI_ISA
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#define MULTI_ISA 0
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#else
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#undef MULTI_ISA
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#define MULTI_ISA 1
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#endif
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#endif /* AMIGA_PCMCIA */
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#ifdef CONFIG_ATARI_ROM_ISA
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#define enec_isa_read_base 0xfffa0000
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#define enec_isa_write_base 0xfffb0000
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#define ENEC_ISA_IO_B(ioaddr) (enec_isa_read_base+((((unsigned long)(ioaddr))&0x7F)<<9))
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#define ENEC_ISA_IO_W(ioaddr) (enec_isa_read_base+((((unsigned long)(ioaddr))&0x7F)<<9))
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#define ENEC_ISA_MEM_B(madr) (enec_isa_read_base+((((unsigned long)(madr))&0x7F)<<9))
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#define ENEC_ISA_MEM_W(madr) (enec_isa_read_base+((((unsigned long)(madr))&0x7F)<<9))
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#ifndef MULTI_ISA
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#define MULTI_ISA 0
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#else
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#undef MULTI_ISA
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#define MULTI_ISA 1
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#endif
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#endif /* ATARI_ROM_ISA */
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#if defined(CONFIG_PCI) && defined(CONFIG_COLDFIRE)
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#define HAVE_ARCH_PIO_SIZE
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#define PIO_OFFSET 0
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#define PIO_MASK 0xffff
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#define PIO_RESERVED 0x10000
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u8 mcf_pci_inb(u32 addr);
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u16 mcf_pci_inw(u32 addr);
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u32 mcf_pci_inl(u32 addr);
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void mcf_pci_insb(u32 addr, u8 *buf, u32 len);
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void mcf_pci_insw(u32 addr, u16 *buf, u32 len);
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void mcf_pci_insl(u32 addr, u32 *buf, u32 len);
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void mcf_pci_outb(u8 v, u32 addr);
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void mcf_pci_outw(u16 v, u32 addr);
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void mcf_pci_outl(u32 v, u32 addr);
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void mcf_pci_outsb(u32 addr, const u8 *buf, u32 len);
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void mcf_pci_outsw(u32 addr, const u16 *buf, u32 len);
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void mcf_pci_outsl(u32 addr, const u32 *buf, u32 len);
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#define inb mcf_pci_inb
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#define inb_p mcf_pci_inb
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#define inw mcf_pci_inw
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#define inw_p mcf_pci_inw
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#define inl mcf_pci_inl
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#define inl_p mcf_pci_inl
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#define insb mcf_pci_insb
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#define insw mcf_pci_insw
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#define insl mcf_pci_insl
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#define outb mcf_pci_outb
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#define outb_p mcf_pci_outb
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#define outw mcf_pci_outw
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#define outw_p mcf_pci_outw
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#define outl mcf_pci_outl
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#define outl_p mcf_pci_outl
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#define outsb mcf_pci_outsb
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#define outsw mcf_pci_outsw
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#define outsl mcf_pci_outsl
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#define readb(addr) in_8(addr)
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#define writeb(v, addr) out_8((addr), (v))
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#define readw(addr) in_le16(addr)
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#define writew(v, addr) out_le16((addr), (v))
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#elif defined(CONFIG_ISA) || defined(CONFIG_ATARI_ROM_ISA)
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#if MULTI_ISA == 0
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#undef MULTI_ISA
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#endif
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#define ISA_TYPE_Q40 (1)
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#define ISA_TYPE_AG (2)
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#define ISA_TYPE_ENEC (3)
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#if defined(CONFIG_Q40) && !defined(MULTI_ISA)
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#define ISA_TYPE ISA_TYPE_Q40
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#define ISA_SEX 0
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#endif
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#if defined(CONFIG_AMIGA_PCMCIA) && !defined(MULTI_ISA)
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#define ISA_TYPE ISA_TYPE_AG
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#define ISA_SEX 1
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#endif
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#if defined(CONFIG_ATARI_ROM_ISA) && !defined(MULTI_ISA)
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#define ISA_TYPE ISA_TYPE_ENEC
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#define ISA_SEX 0
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#endif
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#ifdef MULTI_ISA
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extern int isa_type;
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extern int isa_sex;
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#define ISA_TYPE isa_type
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#define ISA_SEX isa_sex
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#endif
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/*
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* define inline addr translation functions. Normally only one variant will
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* be compiled in so the case statement will be optimised away
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*/
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static inline u8 __iomem *isa_itb(unsigned long addr)
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{
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switch(ISA_TYPE)
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{
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#ifdef CONFIG_Q40
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case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_IO_B(addr);
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#endif
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#ifdef CONFIG_AMIGA_PCMCIA
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case ISA_TYPE_AG: return (u8 __iomem *)AG_ISA_IO_B(addr);
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#endif
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#ifdef CONFIG_ATARI_ROM_ISA
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case ISA_TYPE_ENEC: return (u8 __iomem *)ENEC_ISA_IO_B(addr);
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#endif
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default: return NULL; /* avoid warnings, just in case */
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}
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}
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static inline u16 __iomem *isa_itw(unsigned long addr)
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{
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switch(ISA_TYPE)
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{
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#ifdef CONFIG_Q40
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case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_IO_W(addr);
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#endif
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#ifdef CONFIG_AMIGA_PCMCIA
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case ISA_TYPE_AG: return (u16 __iomem *)AG_ISA_IO_W(addr);
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#endif
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#ifdef CONFIG_ATARI_ROM_ISA
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case ISA_TYPE_ENEC: return (u16 __iomem *)ENEC_ISA_IO_W(addr);
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#endif
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default: return NULL; /* avoid warnings, just in case */
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}
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}
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static inline u32 __iomem *isa_itl(unsigned long addr)
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{
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switch(ISA_TYPE)
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{
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#ifdef CONFIG_AMIGA_PCMCIA
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case ISA_TYPE_AG: return (u32 __iomem *)AG_ISA_IO_W(addr);
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#endif
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default: return 0; /* avoid warnings, just in case */
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}
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}
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static inline u8 __iomem *isa_mtb(unsigned long addr)
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{
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switch(ISA_TYPE)
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{
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#ifdef CONFIG_Q40
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case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_MEM_B(addr);
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#endif
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#ifdef CONFIG_AMIGA_PCMCIA
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case ISA_TYPE_AG: return (u8 __iomem *)addr;
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#endif
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#ifdef CONFIG_ATARI_ROM_ISA
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case ISA_TYPE_ENEC: return (u8 __iomem *)ENEC_ISA_MEM_B(addr);
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#endif
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default: return NULL; /* avoid warnings, just in case */
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}
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}
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static inline u16 __iomem *isa_mtw(unsigned long addr)
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{
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switch(ISA_TYPE)
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{
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#ifdef CONFIG_Q40
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case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_MEM_W(addr);
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#endif
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#ifdef CONFIG_AMIGA_PCMCIA
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case ISA_TYPE_AG: return (u16 __iomem *)addr;
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#endif
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#ifdef CONFIG_ATARI_ROM_ISA
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case ISA_TYPE_ENEC: return (u16 __iomem *)ENEC_ISA_MEM_W(addr);
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#endif
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default: return NULL; /* avoid warnings, just in case */
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}
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}
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#define isa_inb(port) in_8(isa_itb(port))
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#define isa_inw(port) (ISA_SEX ? in_be16(isa_itw(port)) : in_le16(isa_itw(port)))
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#define isa_inl(port) (ISA_SEX ? in_be32(isa_itl(port)) : in_le32(isa_itl(port)))
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#define isa_outb(val,port) out_8(isa_itb(port),(val))
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#define isa_outw(val,port) (ISA_SEX ? out_be16(isa_itw(port),(val)) : out_le16(isa_itw(port),(val)))
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#define isa_outl(val,port) (ISA_SEX ? out_be32(isa_itl(port),(val)) : out_le32(isa_itl(port),(val)))
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#define isa_readb(p) in_8(isa_mtb((unsigned long)(p)))
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#define isa_readw(p) \
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(ISA_SEX ? in_be16(isa_mtw((unsigned long)(p))) \
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: in_le16(isa_mtw((unsigned long)(p))))
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#define isa_writeb(val,p) out_8(isa_mtb((unsigned long)(p)),(val))
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#define isa_writew(val,p) \
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(ISA_SEX ? out_be16(isa_mtw((unsigned long)(p)),(val)) \
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: out_le16(isa_mtw((unsigned long)(p)),(val)))
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#ifdef CONFIG_ATARI_ROM_ISA
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#define isa_rom_inb(port) rom_in_8(isa_itb(port))
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#define isa_rom_inw(port) \
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(ISA_SEX ? rom_in_be16(isa_itw(port)) \
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: rom_in_le16(isa_itw(port)))
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#define isa_rom_outb(val, port) rom_out_8(isa_itb(port), (val))
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#define isa_rom_outw(val, port) \
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(ISA_SEX ? rom_out_be16(isa_itw(port), (val)) \
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: rom_out_le16(isa_itw(port), (val)))
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#define isa_rom_readb(p) rom_in_8(isa_mtb((unsigned long)(p)))
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#define isa_rom_readw(p) \
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(ISA_SEX ? rom_in_be16(isa_mtw((unsigned long)(p))) \
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: rom_in_le16(isa_mtw((unsigned long)(p))))
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#define isa_rom_readw_swap(p) \
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(ISA_SEX ? rom_in_le16(isa_mtw((unsigned long)(p))) \
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: rom_in_be16(isa_mtw((unsigned long)(p))))
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#define isa_rom_readw_raw(p) rom_in_be16(isa_mtw((unsigned long)(p)))
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#define isa_rom_writeb(val, p) rom_out_8(isa_mtb((unsigned long)(p)), (val))
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#define isa_rom_writew(val, p) \
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(ISA_SEX ? rom_out_be16(isa_mtw((unsigned long)(p)), (val)) \
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: rom_out_le16(isa_mtw((unsigned long)(p)), (val)))
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#define isa_rom_writew_swap(val, p) \
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(ISA_SEX ? rom_out_le16(isa_mtw((unsigned long)(p)), (val)) \
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: rom_out_be16(isa_mtw((unsigned long)(p)), (val)))
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#define isa_rom_writew_raw(val, p) rom_out_be16(isa_mtw((unsigned long)(p)), (val))
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#endif /* CONFIG_ATARI_ROM_ISA */
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static inline void isa_delay(void)
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{
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switch(ISA_TYPE)
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{
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#ifdef CONFIG_Q40
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case ISA_TYPE_Q40: isa_outb(0,0x80); break;
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#endif
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#ifdef CONFIG_AMIGA_PCMCIA
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case ISA_TYPE_AG: break;
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#endif
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#ifdef CONFIG_ATARI_ROM_ISA
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case ISA_TYPE_ENEC: break;
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#endif
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default: break; /* avoid warnings */
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}
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}
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#define isa_inb_p(p) ({u8 v=isa_inb(p);isa_delay();v;})
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#define isa_outb_p(v,p) ({isa_outb((v),(p));isa_delay();})
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#define isa_inw_p(p) ({u16 v=isa_inw(p);isa_delay();v;})
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#define isa_outw_p(v,p) ({isa_outw((v),(p));isa_delay();})
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#define isa_inl_p(p) ({u32 v=isa_inl(p);isa_delay();v;})
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#define isa_outl_p(v,p) ({isa_outl((v),(p));isa_delay();})
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#define isa_insb(port, buf, nr) raw_insb(isa_itb(port), (u8 *)(buf), (nr))
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#define isa_outsb(port, buf, nr) raw_outsb(isa_itb(port), (u8 *)(buf), (nr))
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#define isa_insw(port, buf, nr) \
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(ISA_SEX ? raw_insw(isa_itw(port), (u16 *)(buf), (nr)) : \
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raw_insw_swapw(isa_itw(port), (u16 *)(buf), (nr)))
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#define isa_outsw(port, buf, nr) \
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(ISA_SEX ? raw_outsw(isa_itw(port), (u16 *)(buf), (nr)) : \
|
||
|
|
raw_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr)))
|
||
|
|
|
||
|
|
#define isa_insl(port, buf, nr) \
|
||
|
|
(ISA_SEX ? raw_insl(isa_itl(port), (u32 *)(buf), (nr)) : \
|
||
|
|
raw_insw_swapw(isa_itw(port), (u16 *)(buf), (nr)<<1))
|
||
|
|
|
||
|
|
#define isa_outsl(port, buf, nr) \
|
||
|
|
(ISA_SEX ? raw_outsl(isa_itl(port), (u32 *)(buf), (nr)) : \
|
||
|
|
raw_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr)<<1))
|
||
|
|
|
||
|
|
|
||
|
|
#ifdef CONFIG_ATARI_ROM_ISA
|
||
|
|
#define isa_rom_inb_p(p) ({ u8 _v = isa_rom_inb(p); isa_delay(); _v; })
|
||
|
|
#define isa_rom_inw_p(p) ({ u16 _v = isa_rom_inw(p); isa_delay(); _v; })
|
||
|
|
#define isa_rom_outb_p(v, p) ({ isa_rom_outb((v), (p)); isa_delay(); })
|
||
|
|
#define isa_rom_outw_p(v, p) ({ isa_rom_outw((v), (p)); isa_delay(); })
|
||
|
|
|
||
|
|
#define isa_rom_insb(port, buf, nr) raw_rom_insb(isa_itb(port), (u8 *)(buf), (nr))
|
||
|
|
|
||
|
|
#define isa_rom_insw(port, buf, nr) \
|
||
|
|
(ISA_SEX ? raw_rom_insw(isa_itw(port), (u16 *)(buf), (nr)) : \
|
||
|
|
raw_rom_insw_swapw(isa_itw(port), (u16 *)(buf), (nr)))
|
||
|
|
|
||
|
|
#define isa_rom_outsb(port, buf, nr) raw_rom_outsb(isa_itb(port), (u8 *)(buf), (nr))
|
||
|
|
|
||
|
|
#define isa_rom_outsw(port, buf, nr) \
|
||
|
|
(ISA_SEX ? raw_rom_outsw(isa_itw(port), (u16 *)(buf), (nr)) : \
|
||
|
|
raw_rom_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr)))
|
||
|
|
#endif /* CONFIG_ATARI_ROM_ISA */
|
||
|
|
|
||
|
|
#endif /* CONFIG_ISA || CONFIG_ATARI_ROM_ISA */
|
||
|
|
|
||
|
|
|
||
|
|
#if defined(CONFIG_ISA) && !defined(CONFIG_ATARI_ROM_ISA)
|
||
|
|
#define inb isa_inb
|
||
|
|
#define inb_p isa_inb_p
|
||
|
|
#define outb isa_outb
|
||
|
|
#define outb_p isa_outb_p
|
||
|
|
#define inw isa_inw
|
||
|
|
#define inw_p isa_inw_p
|
||
|
|
#define outw isa_outw
|
||
|
|
#define outw_p isa_outw_p
|
||
|
|
#define inl isa_inl
|
||
|
|
#define inl_p isa_inl_p
|
||
|
|
#define outl isa_outl
|
||
|
|
#define outl_p isa_outl_p
|
||
|
|
#define insb isa_insb
|
||
|
|
#define insw isa_insw
|
||
|
|
#define insl isa_insl
|
||
|
|
#define outsb isa_outsb
|
||
|
|
#define outsw isa_outsw
|
||
|
|
#define outsl isa_outsl
|
||
|
|
#define readb isa_readb
|
||
|
|
#define readw isa_readw
|
||
|
|
#define writeb isa_writeb
|
||
|
|
#define writew isa_writew
|
||
|
|
#endif /* CONFIG_ISA && !CONFIG_ATARI_ROM_ISA */
|
||
|
|
|
||
|
|
#ifdef CONFIG_ATARI_ROM_ISA
|
||
|
|
/*
|
||
|
|
* kernel with both ROM port ISA and IDE compiled in, those have
|
||
|
|
* conflicting defs for in/out. Simply consider port < 1024
|
||
|
|
* ROM port ISA and everything else regular ISA for IDE. read,write defined
|
||
|
|
* below.
|
||
|
|
*/
|
||
|
|
#define inb(port) ((port) < 1024 ? isa_rom_inb(port) : in_8(port))
|
||
|
|
#define inb_p(port) ((port) < 1024 ? isa_rom_inb_p(port) : in_8(port))
|
||
|
|
#define inw(port) ((port) < 1024 ? isa_rom_inw(port) : in_le16(port))
|
||
|
|
#define inw_p(port) ((port) < 1024 ? isa_rom_inw_p(port) : in_le16(port))
|
||
|
|
#define inl isa_inl
|
||
|
|
#define inl_p isa_inl_p
|
||
|
|
|
||
|
|
#define outb(val, port) ((port) < 1024 ? isa_rom_outb((val), (port)) : out_8((port), (val)))
|
||
|
|
#define outb_p(val, port) ((port) < 1024 ? isa_rom_outb_p((val), (port)) : out_8((port), (val)))
|
||
|
|
#define outw(val, port) ((port) < 1024 ? isa_rom_outw((val), (port)) : out_le16((port), (val)))
|
||
|
|
#define outw_p(val, port) ((port) < 1024 ? isa_rom_outw_p((val), (port)) : out_le16((port), (val)))
|
||
|
|
#define outl isa_outl
|
||
|
|
#define outl_p isa_outl_p
|
||
|
|
|
||
|
|
#define insb(port, buf, nr) ((port) < 1024 ? isa_rom_insb((port), (buf), (nr)) : isa_insb((port), (buf), (nr)))
|
||
|
|
#define insw(port, buf, nr) ((port) < 1024 ? isa_rom_insw((port), (buf), (nr)) : isa_insw((port), (buf), (nr)))
|
||
|
|
#define insl isa_insl
|
||
|
|
#define outsb(port, buf, nr) ((port) < 1024 ? isa_rom_outsb((port), (buf), (nr)) : isa_outsb((port), (buf), (nr)))
|
||
|
|
#define outsw(port, buf, nr) ((port) < 1024 ? isa_rom_outsw((port), (buf), (nr)) : isa_outsw((port), (buf), (nr)))
|
||
|
|
#define outsl isa_outsl
|
||
|
|
|
||
|
|
#define readb(addr) in_8(addr)
|
||
|
|
#define writeb(val, addr) out_8((addr), (val))
|
||
|
|
#define readw(addr) in_le16(addr)
|
||
|
|
#define writew(val, addr) out_le16((addr), (val))
|
||
|
|
#endif /* CONFIG_ATARI_ROM_ISA */
|
||
|
|
|
||
|
|
#if !defined(CONFIG_ISA) && !defined(CONFIG_ATARI_ROM_ISA) && \
|
||
|
|
!(defined(CONFIG_PCI) && defined(CONFIG_COLDFIRE))
|
||
|
|
/*
|
||
|
|
* We need to define dummy functions for GENERIC_IOMAP support.
|
||
|
|
*/
|
||
|
|
#define inb(port) 0xff
|
||
|
|
#define inb_p(port) 0xff
|
||
|
|
#define outb(val,port) ((void)0)
|
||
|
|
#define outb_p(val,port) ((void)0)
|
||
|
|
#define inw(port) 0xffff
|
||
|
|
#define inw_p(port) 0xffff
|
||
|
|
#define outw(val,port) ((void)0)
|
||
|
|
#define outw_p(val,port) ((void)0)
|
||
|
|
#define inl(port) 0xffffffffUL
|
||
|
|
#define inl_p(port) 0xffffffffUL
|
||
|
|
#define outl(val,port) ((void)0)
|
||
|
|
#define outl_p(val,port) ((void)0)
|
||
|
|
|
||
|
|
#define insb(port,buf,nr) ((void)0)
|
||
|
|
#define outsb(port,buf,nr) ((void)0)
|
||
|
|
#define insw(port,buf,nr) ((void)0)
|
||
|
|
#define outsw(port,buf,nr) ((void)0)
|
||
|
|
#define insl(port,buf,nr) ((void)0)
|
||
|
|
#define outsl(port,buf,nr) ((void)0)
|
||
|
|
|
||
|
|
/*
|
||
|
|
* These should be valid on any ioremap()ed region
|
||
|
|
*/
|
||
|
|
#define readb(addr) in_8(addr)
|
||
|
|
#define writeb(val,addr) out_8((addr),(val))
|
||
|
|
#define readw(addr) in_le16(addr)
|
||
|
|
#define writew(val,addr) out_le16((addr),(val))
|
||
|
|
|
||
|
|
#endif /* !CONFIG_ISA && !CONFIG_ATARI_ROM_ISA */
|
||
|
|
|
||
|
|
#define readl(addr) in_le32(addr)
|
||
|
|
#define writel(val,addr) out_le32((addr),(val))
|
||
|
|
|
||
|
|
#define readsb(port, buf, nr) raw_insb((port), (u8 *)(buf), (nr))
|
||
|
|
#define readsw(port, buf, nr) raw_insw((port), (u16 *)(buf), (nr))
|
||
|
|
#define readsl(port, buf, nr) raw_insl((port), (u32 *)(buf), (nr))
|
||
|
|
#define writesb(port, buf, nr) raw_outsb((port), (u8 *)(buf), (nr))
|
||
|
|
#define writesw(port, buf, nr) raw_outsw((port), (u16 *)(buf), (nr))
|
||
|
|
#define writesl(port, buf, nr) raw_outsl((port), (u32 *)(buf), (nr))
|
||
|
|
|
||
|
|
#define mmiowb()
|
||
|
|
|
||
|
|
static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
|
||
|
|
{
|
||
|
|
return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
|
||
|
|
}
|
||
|
|
static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size)
|
||
|
|
{
|
||
|
|
return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
|
||
|
|
}
|
||
|
|
#define ioremap_uc ioremap_nocache
|
||
|
|
static inline void __iomem *ioremap_wt(unsigned long physaddr,
|
||
|
|
unsigned long size)
|
||
|
|
{
|
||
|
|
return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
|
||
|
|
}
|
||
|
|
static inline void __iomem *ioremap_fullcache(unsigned long physaddr,
|
||
|
|
unsigned long size)
|
||
|
|
{
|
||
|
|
return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
|
||
|
|
{
|
||
|
|
__builtin_memset((void __force *) addr, val, count);
|
||
|
|
}
|
||
|
|
static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
|
||
|
|
{
|
||
|
|
__builtin_memcpy(dst, (void __force *) src, count);
|
||
|
|
}
|
||
|
|
static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
|
||
|
|
{
|
||
|
|
__builtin_memcpy((void __force *) dst, src, count);
|
||
|
|
}
|
||
|
|
|
||
|
|
#ifndef CONFIG_SUN3
|
||
|
|
#define IO_SPACE_LIMIT 0xffff
|
||
|
|
#else
|
||
|
|
#define IO_SPACE_LIMIT 0x0fffffff
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif /* __KERNEL__ */
|
||
|
|
|
||
|
|
#define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Convert a physical pointer to a virtual kernel pointer for /dev/mem
|
||
|
|
* access
|
||
|
|
*/
|
||
|
|
#define xlate_dev_mem_ptr(p) __va(p)
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Convert a virtual cached pointer to an uncached pointer
|
||
|
|
*/
|
||
|
|
#define xlate_dev_kmem_ptr(p) p
|
||
|
|
|
||
|
|
static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
|
||
|
|
{
|
||
|
|
return (void __iomem *) port;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline void ioport_unmap(void __iomem *p)
|
||
|
|
{
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif /* _IO_H */
|