92 lines
2.2 KiB
Plaintext
92 lines
2.2 KiB
Plaintext
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/*
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* Device Tree Source for the r8a7795 ES1.x SoC
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*
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* Copyright (C) 2015 Renesas Electronics Corp.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include "r8a7795.dtsi"
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&soc {
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xhci1: usb@ee040000 {
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compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
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reg = <0 0xee040000 0 0xc00>;
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interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 327>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 327>;
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status = "disabled";
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};
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/delete-node/ usb-phy@ee0e0200;
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/delete-node/ usb@ee0e0100;
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/delete-node/ usb@ee0e0000;
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/delete-node/ usb@e659c000;
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/delete-node/ dma-controller@e6460000;
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/delete-node/ dma-controller@e6470000;
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fcpf2: fcp@fe952000 {
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compatible = "renesas,fcpf";
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reg = <0 0xfe952000 0 0x200>;
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clocks = <&cpg CPG_MOD 613>;
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power-domains = <&sysc R8A7795_PD_A3VP>;
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resets = <&cpg 613>;
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};
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vspi2: vsp@fe9c0000 {
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compatible = "renesas,vsp2";
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reg = <0 0xfe9c0000 0 0x8000>;
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interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 629>;
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power-domains = <&sysc R8A7795_PD_A3VP>;
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resets = <&cpg 629>;
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renesas,fcp = <&fcpvi2>;
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};
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fcpvi2: fcp@fe9cf000 {
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compatible = "renesas,fcpv";
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reg = <0 0xfe9cf000 0 0x200>;
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clocks = <&cpg CPG_MOD 609>;
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power-domains = <&sysc R8A7795_PD_A3VP>;
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resets = <&cpg 609>;
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};
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vspd3: vsp@fea38000 {
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compatible = "renesas,vsp2";
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reg = <0 0xfea38000 0 0x4000>;
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interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 620>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 620>;
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renesas,fcp = <&fcpvd3>;
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};
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fcpvd3: fcp@fea3f000 {
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compatible = "renesas,fcpv";
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reg = <0 0xfea3f000 0 0x200>;
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clocks = <&cpg CPG_MOD 600>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 600>;
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};
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fdp1@fe948000 {
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compatible = "renesas,fdp1";
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reg = <0 0xfe948000 0 0x2400>;
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interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 117>;
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power-domains = <&sysc R8A7795_PD_A3VP>;
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resets = <&cpg 117>;
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renesas,fcp = <&fcpf2>;
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};
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};
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&du {
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vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
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};
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