431 lines
10 KiB
Plaintext
431 lines
10 KiB
Plaintext
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/*
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* Copyright 2014 Soeren Moch <smoch@web.de>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public
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* License along with this file; if not, write to the Free
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* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "imx6q.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "TBS2910 Matrix ARM mini PC";
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compatible = "tbs,imx6q-tbs2910", "fsl,imx6q";
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chosen {
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stdout-path = &uart1;
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};
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memory {
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reg = <0x10000000 0x80000000>;
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};
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fan {
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compatible = "gpio-fan";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_fan>;
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gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
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gpio-fan,speed-map = <0 0
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3000 1>;
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};
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ir_recv {
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compatible = "gpio-ir-receiver";
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gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ir>;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_leds>;
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blue {
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label = "blue_status_led";
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gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
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default-state = "keep";
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};
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};
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reg_2p5v: regulator-2p5v {
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compatible = "regulator-fixed";
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regulator-name = "2P5V";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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reg_5p0v: regulator-5p0v {
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compatible = "regulator-fixed";
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regulator-name = "5P0V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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sound-sgtl5000 {
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audio-codec = <&sgtl5000>;
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audio-routing =
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"MIC_IN", "Mic Jack",
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"Mic Jack", "Mic Bias",
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"Headphone Jack", "HP_OUT";
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compatible = "fsl,imx-audio-sgtl5000";
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model = "On-board Codec";
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mux-ext-port = <3>;
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mux-int-port = <1>;
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ssi-controller = <&ssi1>;
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};
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sound-spdif {
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compatible = "fsl,imx-audio-spdif";
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model = "On-board SPDIF";
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spdif-controller = <&spdif>;
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spdif-out;
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};
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};
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&audmux {
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status = "okay";
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rgmii";
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phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&hdmi {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hdmi>;
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ddc-i2c-bus = <&i2c2>;
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status = "okay";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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sgtl5000: sgtl5000@a {
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clocks = <&clks IMX6QDL_CLK_CKO>;
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compatible = "fsl,sgtl5000";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sgtl5000>;
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reg = <0x0a>;
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VDDA-supply = <®_2p5v>;
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VDDIO-supply = <®_3p3v>;
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};
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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rtc: ds1307@68 {
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compatible = "dallas,ds1307";
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reg = <0x68>;
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};
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};
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&pcie {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pcie>;
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reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&sata {
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fsl,transmit-level-mV = <1104>;
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fsl,transmit-boost-mdB = <3330>;
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fsl,transmit-atten-16ths = <16>;
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fsl,receive-eq-mdB = <3000>;
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status = "okay";
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};
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&snvs_poweroff {
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status = "okay";
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};
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&spdif {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spdif>;
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status = "okay";
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};
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&ssi1 {
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&usbh1 {
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vbus-supply = <®_5p0v>;
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status = "okay";
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};
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&usbotg {
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vbus-supply = <®_5p0v>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg>;
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disable-over-current;
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2>;
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bus-width = <4>;
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cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_3p3v>;
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voltage-ranges = <3300 3300>;
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no-1-8-v;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3>;
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bus-width = <4>;
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cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_3p3v>;
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voltage-ranges = <3300 3300>;
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no-1-8-v;
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status = "okay";
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};
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&usdhc4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc4>;
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bus-width = <8>;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_3p3v>;
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voltage-ranges = <3300 3300>;
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non-removable;
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no-1-8-v;
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status = "okay";
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};
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&iomuxc {
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
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MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
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MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b059
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>;
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};
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pinctrl_gpio_fan: gpiofangrp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x130b1
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>;
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};
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pinctrl_gpio_leds: gpioledsgrp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x130b1
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>;
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};
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pinctrl_hdmi: hdmigrp {
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fsl,pins = <
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MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
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MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
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MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
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MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
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>;
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};
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pinctrl_ir: irgrp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x17059
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>;
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};
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pinctrl_pcie: pciegrp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x17059
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>;
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};
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pinctrl_sgtl5000: sgtl5000grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
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MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
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MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
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MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
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MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_spdif: spdifgrp {
|
||
|
|
fsl,pins = <MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x13091
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_uart1: uart1grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
|
||
|
|
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_uart2: uart2grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
|
||
|
|
MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usbotg: usbotggrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc2: usdhc2grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
|
||
|
|
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
|
||
|
|
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
|
||
|
|
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
|
||
|
|
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
|
||
|
|
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
|
||
|
|
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x17059
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc3: usdhc3grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
||
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
||
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
||
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
||
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
||
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
||
|
|
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x17059
|
||
|
|
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x17059
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc4: usdhc4grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
|
||
|
|
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
|
||
|
|
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
|
||
|
|
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
|
||
|
|
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
|
||
|
|
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
|
||
|
|
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
|
||
|
|
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
|
||
|
|
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
|
||
|
|
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|