526 lines
12 KiB
Plaintext
526 lines
12 KiB
Plaintext
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/*
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* Copyright (C) 2017 MOXA Inc. - https://www.moxa.com/
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*
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* Author: SZ Lin (林上智) <sz.lin@moxa.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "am33xx.dtsi"
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/ {
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model = "Moxa UC-8100-ME-T";
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compatible = "moxa,uc-8100-me-t", "ti,am33xx";
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cpus {
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cpu@0 {
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cpu0-supply = <&vdd1_reg>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0x80000000 0x20000000>; /* 512 MB */
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};
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vbat: vbat-regulator {
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compatible = "regulator-fixed";
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};
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/* Power supply provides a fixed 3.3V @3A */
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vmmcsd_fixed: vmmcsd-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vmmcsd_fixed";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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};
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leds {
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compatible = "gpio-leds";
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led1 {
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label = "uc8100me:CEL1";
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gpios = <&gpio_xten 8 0>;
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default-state = "off";
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};
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led2 {
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label = "uc8100me:CEL2";
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gpios = <&gpio_xten 9 0>;
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default-state = "off";
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};
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led3 {
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label = "uc8100me:CEL3";
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gpios = <&gpio_xten 10 0>;
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default-state = "off";
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};
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led4 {
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label = "uc8100me:DIA1";
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gpios = <&gpio_xten 11 0>;
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default-state = "off";
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};
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led5 {
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label = "uc8100me:DIA2";
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gpios = <&gpio_xten 12 0>;
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default-state = "off";
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};
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led6 {
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label = "uc8100me:DIA3";
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gpios = <&gpio_xten 13 0>;
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default-state = "off";
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};
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led7 {
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label = "uc8100me:SD";
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gpios = <&gpio_xten 14 0>;
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default-state = "off";
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};
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led8 {
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label = "uc8100me:USB";
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gpios = <&gpio_xten 15 0>;
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default-state = "off";
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};
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led9 {
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label = "uc8100me:USER";
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gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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buttons: push_button {
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compatible = "gpio-keys";
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};
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};
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&am33xx_pinmux {
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pinctrl-names = "default";
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pinctrl-0 = <&minipcie_pins>;
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minipcie_pins: pinmux_minipcie {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.gpio2_24 */
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AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.gpio2_25 */
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AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.gpio2_22 Power off PIN*/
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>;
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};
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push_button_pins: pinmux_push_button {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahcklx.gpio3_21 */
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>;
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};
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i2c0_pins: pinmux_i2c0_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
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AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
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>;
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};
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i2c1_pins: pinmux_i2c1_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_ctsn.i2c1_sda */
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AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_rtsn.i2c1_scl */
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>;
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};
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uart0_pins: pinmux_uart0_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
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AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
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>;
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};
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uart1_pins: pinmux_uart1_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
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AM33XX_IOPAD(0x97C, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
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AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
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AM33XX_IOPAD(0x984, PIN_OUTPUT | MUX_MODE0) /* uart1_txd.uart1_txd */
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>;
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};
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uart2_pins: pinmux_uart2_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x8d8, PIN_INPUT | MUX_MODE6) /* lcd_data14.uart5_ctsn */
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AM33XX_IOPAD(0x8dc, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* lcd_data15.uart5_rtsn */
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AM33XX_IOPAD(0x8c4, PIN_INPUT_PULLUP | MUX_MODE4) /* lcd_data9.uart5_rxd */
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AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE4) /* lcd_data8.uart5_txd */
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>;
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};
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cpsw_default: cpsw_default {
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pinctrl-single,pins = <
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/* Slave 1 */
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AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
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AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
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AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */
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AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
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AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
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AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
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AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
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AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mii1_refclk.rmii1_refclk */
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/* Slave 2 */
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AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_crs_dv */
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AM33XX_IOPAD(0x874, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rxer */
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AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_txen */
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AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td1 */
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AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td0 */
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AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd1 */
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AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd0 */
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AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii2_refclk */
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>;
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};
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davinci_mdio_default: davinci_mdio_default {
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pinctrl-single,pins = <
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/* MDIO */
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AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
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AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
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>;
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};
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mmc0_pins_default: pinmux_mmc0_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3 */
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AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2 */
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AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1 */
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AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0 */
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AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk */
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AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd */
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AM33XX_IOPAD(0x990, PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkx.gpio3_14 */
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AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkx.gpio3_18 */
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>;
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};
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mmc2_pins_default: pinmux_mmc2_pins {
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pinctrl-single,pins = <
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/* eMMC */
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AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */
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AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */
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AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */
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AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */
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AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad8.mmc2_dat4 */
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AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad9.mmc2_dat5 */
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AM33XX_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad10.mmc2_dat6 */
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AM33XX_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad11.mmc2_dat7 */
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AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */
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AM33XX_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_clk.mmc2_clk */
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>;
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};
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spi0_pins: pinmux_spi0 {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */
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AM33XX_IOPAD(0x95C, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
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AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
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AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
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>;
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};
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};
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&uart0 {
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/* Console */
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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};
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&uart1 {
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/* UART 1 setting */
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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};
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&uart5 {
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/* UART 2 setting */
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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status = "okay";
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clock-frequency = <400000>;
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tpm: tpm@20 {
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compatible = "infineon,slb9645tt";
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reg = <0x20>;
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};
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tps: tps@2d {
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compatible = "ti,tps65910";
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reg = <0x2d>;
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};
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eeprom: eeprom@50 {
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compatible = "atmel,24c16";
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pagesize = <16>;
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reg = <0x50>;
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};
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rtc_wdt: rtc_wdt@68 {
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compatible = "dallas,ds1374";
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reg = <0x68>;
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};
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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status = "okay";
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clock-frequency = <400000>;
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gpio_xten: gpio_xten@27 {
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compatible = "nxp,pca9535";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x27>;
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};
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};
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&usb {
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status = "okay";
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};
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&usb_ctrl_mod {
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status = "okay";
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};
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&usb0_phy {
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status = "okay";
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};
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&usb1_phy {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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dr_mode = "host";
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};
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&usb1 {
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status = "okay";
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dr_mode = "host";
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};
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&cppi41dma {
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|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
#include "tps65910.dtsi"
|
||
|
|
|
||
|
|
&tps {
|
||
|
|
vcc1-supply = <&vbat>;
|
||
|
|
vcc2-supply = <&vbat>;
|
||
|
|
vcc3-supply = <&vbat>;
|
||
|
|
vcc4-supply = <&vbat>;
|
||
|
|
vcc5-supply = <&vbat>;
|
||
|
|
vcc6-supply = <&vbat>;
|
||
|
|
vcc7-supply = <&vbat>;
|
||
|
|
vccio-supply = <&vbat>;
|
||
|
|
|
||
|
|
regulators {
|
||
|
|
vrtc_reg: regulator@0 {
|
||
|
|
regulator-always-on;
|
||
|
|
};
|
||
|
|
|
||
|
|
vio_reg: regulator@1 {
|
||
|
|
regulator-always-on;
|
||
|
|
};
|
||
|
|
|
||
|
|
vdd1_reg: regulator@2 {
|
||
|
|
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||
|
|
regulator-name = "vdd_mpu";
|
||
|
|
regulator-min-microvolt = <912500>;
|
||
|
|
regulator-max-microvolt = <1378000>;
|
||
|
|
regulator-boot-on;
|
||
|
|
regulator-always-on;
|
||
|
|
};
|
||
|
|
|
||
|
|
vdd2_reg: regulator@3 {
|
||
|
|
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||
|
|
regulator-name = "vdd_core";
|
||
|
|
regulator-min-microvolt = <912500>;
|
||
|
|
regulator-max-microvolt = <1150000>;
|
||
|
|
regulator-boot-on;
|
||
|
|
regulator-always-on;
|
||
|
|
};
|
||
|
|
|
||
|
|
vdd3_reg: regulator@4 {
|
||
|
|
regulator-always-on;
|
||
|
|
};
|
||
|
|
|
||
|
|
vdig1_reg: regulator@5 {
|
||
|
|
regulator-always-on;
|
||
|
|
};
|
||
|
|
|
||
|
|
vdig2_reg: regulator@6 {
|
||
|
|
regulator-always-on;
|
||
|
|
};
|
||
|
|
|
||
|
|
vpll_reg: regulator@7 {
|
||
|
|
regulator-always-on;
|
||
|
|
};
|
||
|
|
|
||
|
|
vdac_reg: regulator@8 {
|
||
|
|
regulator-always-on;
|
||
|
|
};
|
||
|
|
|
||
|
|
vaux1_reg: regulator@9 {
|
||
|
|
regulator-always-on;
|
||
|
|
};
|
||
|
|
|
||
|
|
vaux2_reg: regulator@10 {
|
||
|
|
regulator-always-on;
|
||
|
|
};
|
||
|
|
|
||
|
|
vaux33_reg: regulator@11 {
|
||
|
|
regulator-always-on;
|
||
|
|
};
|
||
|
|
|
||
|
|
vmmc_reg: regulator@12 {
|
||
|
|
compatible = "regulator-fixed";
|
||
|
|
regulator-name = "vmmc_reg";
|
||
|
|
regulator-min-microvolt = <3300000>;
|
||
|
|
regulator-max-microvolt = <3300000>;
|
||
|
|
regulator-always-on;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
/* Power */
|
||
|
|
&vbat {
|
||
|
|
regulator-name = "vbat";
|
||
|
|
regulator-min-microvolt = <5000000>;
|
||
|
|
regulator-max-microvolt = <5000000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&mac {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&cpsw_default>;
|
||
|
|
dual_emac = <1>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&davinci_mdio {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&davinci_mdio_default>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&cpsw_emac0 {
|
||
|
|
status = "okay";
|
||
|
|
phy_id = <&davinci_mdio>, <4>;
|
||
|
|
phy-mode = "rmii";
|
||
|
|
dual_emac_res_vlan = <1>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&cpsw_emac1 {
|
||
|
|
status = "okay";
|
||
|
|
phy_id = <&davinci_mdio>, <5>;
|
||
|
|
phy-mode = "rmii";
|
||
|
|
dual_emac_res_vlan = <2>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&phy_sel {
|
||
|
|
reg= <0x44e10650 0xf5>;
|
||
|
|
rmii-clock-ext;
|
||
|
|
};
|
||
|
|
|
||
|
|
&sham {
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&aes {
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&gpio0 {
|
||
|
|
ti,no-reset-on-init;
|
||
|
|
};
|
||
|
|
|
||
|
|
&mmc1 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
vmmc-supply = <&vmmcsd_fixed>;
|
||
|
|
bus-width = <4>;
|
||
|
|
pinctrl-0 = <&mmc0_pins_default>;
|
||
|
|
cd-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
|
||
|
|
wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&mmc3 {
|
||
|
|
dmas = <&edma_xbar 12 0 1
|
||
|
|
&edma_xbar 13 0 2>;
|
||
|
|
dma-names = "tx", "rx";
|
||
|
|
pinctrl-names = "default";
|
||
|
|
vmmc-supply = <&vmmcsd_fixed>;
|
||
|
|
bus-width = <8>;
|
||
|
|
pinctrl-0 = <&mmc2_pins_default>;
|
||
|
|
ti,non-removable;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&buttons {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&push_button_pins>;
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
button@0 {
|
||
|
|
label = "push_button";
|
||
|
|
linux,code = <0x100>;
|
||
|
|
gpios = <&gpio3 21 GPIO_ACTIVE_LOW>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
/* SPI Busses */
|
||
|
|
&spi0 {
|
||
|
|
status = "okay";
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&spi0_pins>;
|
||
|
|
|
||
|
|
m25p80@0 {
|
||
|
|
compatible = "mx25l6405d";
|
||
|
|
spi-max-frequency = <40000000>;
|
||
|
|
|
||
|
|
reg = <0>;
|
||
|
|
spi-cpol;
|
||
|
|
spi-cpha;
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <1>;
|
||
|
|
|
||
|
|
/* reg : The partition's offset and size within the mtd bank. */
|
||
|
|
partitions@0 {
|
||
|
|
label = "MLO";
|
||
|
|
reg = <0x0 0x80000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
partitions@1 {
|
||
|
|
label = "U-Boot";
|
||
|
|
reg = <0x80000 0x100000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
partitions@2 {
|
||
|
|
label = "U-Boot Env";
|
||
|
|
reg = <0x180000 0x20000>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|