66 lines
2.4 KiB
Plaintext
66 lines
2.4 KiB
Plaintext
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Qualcomm SPMI Controller (PMIC Arbiter)
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The SPMI PMIC Arbiter is found on Snapdragon chipsets. It is an SPMI
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controller with wrapping arbitration logic to allow for multiple on-chip
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devices to control a single SPMI master.
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The PMIC Arbiter can also act as an interrupt controller, providing interrupts
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to slave devices.
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See spmi.txt for the generic SPMI controller binding requirements for child
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nodes.
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See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for
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generic interrupt controller binding documentation.
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Required properties:
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- compatible : should be "qcom,spmi-pmic-arb".
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- reg-names : must contain:
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"core" - core registers
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"intr" - interrupt controller registers
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"cnfg" - configuration registers
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Registers used only for V2 PMIC Arbiter:
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"chnls" - tx-channel per virtual slave registers.
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"obsrvr" - rx-channel (called observer) per virtual slave registers.
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- reg : address + size pairs describing the PMIC arb register sets; order must
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correspond with the order of entries in reg-names
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- #address-cells : must be set to 2
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- #size-cells : must be set to 0
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- qcom,ee : indicates the active Execution Environment identifier (0-5)
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- qcom,channel : which of the PMIC Arb provided channels to use for accesses (0-5)
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- interrupts : interrupt list for the PMIC Arb controller, must contain a
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single interrupt entry for the peripheral interrupt
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- interrupt-names : corresponding interrupt names for the interrupts
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listed in the 'interrupts' property, must contain:
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"periph_irq" - summary interrupt for PMIC peripherals
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- interrupt-controller : boolean indicator that the PMIC arbiter is an interrupt controller
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- #interrupt-cells : must be set to 4. Interrupts are specified as a 4-tuple:
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cell 1: slave ID for the requested interrupt (0-15)
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cell 2: peripheral ID for requested interrupt (0-255)
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cell 3: the requested peripheral interrupt (0-7)
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cell 4: interrupt flags indicating level-sense information, as defined in
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dt-bindings/interrupt-controller/irq.h
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Example:
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spmi {
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compatible = "qcom,spmi-pmic-arb";
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reg-names = "core", "intr", "cnfg";
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reg = <0xfc4cf000 0x1000>,
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<0xfc4cb000 0x1000>,
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<0xfc4ca000 0x1000>;
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interrupt-names = "periph_irq";
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interrupts = <0 190 0>;
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qcom,ee = <0>;
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qcom,channel = <0>;
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#address-cells = <2>;
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#size-cells = <0>;
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interrupt-controller;
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#interrupt-cells = <4>;
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};
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