38 lines
1.5 KiB
Plaintext
38 lines
1.5 KiB
Plaintext
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Rockchip Successive Approximation Register (SAR) A/D Converter bindings
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Required properties:
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- compatible: should be "rockchip,<name>-saradc" or "rockchip,rk3066-tsadc"
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- "rockchip,saradc": for rk3188, rk3288
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- "rockchip,rk3066-tsadc": for rk3036
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- "rockchip,rk3328-saradc", "rockchip,rk3399-saradc": for rk3328
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- "rockchip,rk3399-saradc": for rk3399
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- "rockchip,rv1108-saradc", "rockchip,rk3399-saradc": for rv1108
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- reg: physical base address of the controller and length of memory mapped
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region.
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- interrupts: The interrupt number to the cpu. The interrupt specifier format
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depends on the interrupt controller.
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- clocks: Must contain an entry for each entry in clock-names.
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- clock-names: Shall be "saradc" for the converter-clock, and "apb_pclk" for
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the peripheral clock.
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- vref-supply: The regulator supply ADC reference voltage.
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- #io-channel-cells: Should be 1, see ../iio-bindings.txt
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Optional properties:
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- resets: Must contain an entry for each entry in reset-names if need support
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this option. See ../reset/reset.txt for details.
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- reset-names: Must include the name "saradc-apb".
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Example:
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saradc: saradc@2006c000 {
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compatible = "rockchip,saradc";
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reg = <0x2006c000 0x100>;
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interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
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clock-names = "saradc", "apb_pclk";
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resets = <&cru SRST_SARADC>;
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reset-names = "saradc-apb";
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#io-channel-cells = <1>;
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vref-supply = <&vcc18>;
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};
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