62 lines
2.0 KiB
Plaintext
62 lines
2.0 KiB
Plaintext
|
* Rockchip RK3188/RK3066 Clock and Reset Unit
|
||
|
|
|
||
|
|
The RK3188/RK3066 clock controller generates and supplies clock to various
|
||
|
|
controllers within the SoC and also implements a reset controller for SoC
|
||
|
|
peripherals.
|
||
|
|
|
||
|
|
Required Properties:
|
||
|
|
|
||
|
|
- compatible: should be "rockchip,rk3188-cru", "rockchip,rk3188a-cru" or
|
||
|
|
"rockchip,rk3066a-cru"
|
||
|
|
- reg: physical base address of the controller and length of memory mapped
|
||
|
|
region.
|
||
|
|
- #clock-cells: should be 1.
|
||
|
|
- #reset-cells: should be 1.
|
||
|
|
|
||
|
|
Optional Properties:
|
||
|
|
|
||
|
|
- rockchip,grf: phandle to the syscon managing the "general register files"
|
||
|
|
If missing pll rates are not changeable, due to the missing pll lock status.
|
||
|
|
|
||
|
|
Each clock is assigned an identifier and client nodes can use this identifier
|
||
|
|
to specify the clock which they consume. All available clocks are defined as
|
||
|
|
preprocessor macros in the dt-bindings/clock/rk3188-cru.h and
|
||
|
|
dt-bindings/clock/rk3066-cru.h headers and can be used in device tree sources.
|
||
|
|
Similar macros exist for the reset sources in these files.
|
||
|
|
|
||
|
|
External clocks:
|
||
|
|
|
||
|
|
There are several clocks that are generated outside the SoC. It is expected
|
||
|
|
that they are defined using standard clock bindings with following
|
||
|
|
clock-output-names:
|
||
|
|
- "xin24m" - crystal input - required,
|
||
|
|
- "xin32k" - rtc clock - optional,
|
||
|
|
- "xin27m" - 27mhz crystal input on rk3066 - optional,
|
||
|
|
- "ext_hsadc" - external HSADC clock - optional,
|
||
|
|
- "ext_cif0" - external camera clock - optional,
|
||
|
|
- "ext_rmii" - external RMII clock - optional,
|
||
|
|
- "ext_jtag" - externalJTAG clock - optional
|
||
|
|
|
||
|
|
Example: Clock controller node:
|
||
|
|
|
||
|
|
cru: cru@20000000 {
|
||
|
|
compatible = "rockchip,rk3188-cru";
|
||
|
|
reg = <0x20000000 0x1000>;
|
||
|
|
rockchip,grf = <&grf>;
|
||
|
|
|
||
|
|
#clock-cells = <1>;
|
||
|
|
#reset-cells = <1>;
|
||
|
|
};
|
||
|
|
|
||
|
|
Example: UART controller node that consumes the clock generated by the clock
|
||
|
|
controller:
|
||
|
|
|
||
|
|
uart0: serial@10124000 {
|
||
|
|
compatible = "snps,dw-apb-uart";
|
||
|
|
reg = <0x10124000 0x400>;
|
||
|
|
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
|
reg-shift = <2>;
|
||
|
|
reg-io-width = <1>;
|
||
|
|
clocks = <&cru SCLK_UART0>;
|
||
|
|
};
|