92 lines
2.0 KiB
C
92 lines
2.0 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* This header provides constants clk index STMicroelectronics
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* STiH407 SoC.
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*/
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#ifndef _DT_BINDINGS_CLK_STIH407
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#define _DT_BINDINGS_CLK_STIH407
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/* CLOCKGEN A0 */
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#define CLK_IC_LMI0 0
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#define CLK_IC_LMI1 1
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/* CLOCKGEN C0 */
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#define CLK_ICN_GPU 0
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#define CLK_FDMA 1
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#define CLK_NAND 2
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#define CLK_HVA 3
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#define CLK_PROC_STFE 4
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#define CLK_PROC_TP 5
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#define CLK_RX_ICN_DMU 6
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#define CLK_RX_ICN_DISP_0 6
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#define CLK_RX_ICN_DISP_1 6
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#define CLK_RX_ICN_HVA 7
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#define CLK_RX_ICN_TS 7
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#define CLK_ICN_CPU 8
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#define CLK_TX_ICN_DMU 9
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#define CLK_TX_ICN_HVA 9
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#define CLK_TX_ICN_TS 9
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#define CLK_ICN_COMPO 9
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#define CLK_MMC_0 10
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#define CLK_MMC_1 11
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#define CLK_JPEGDEC 12
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#define CLK_ICN_REG 13
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#define CLK_TRACE_A9 13
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#define CLK_PTI_STM 13
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#define CLK_EXT2F_A9 13
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#define CLK_IC_BDISP_0 14
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#define CLK_IC_BDISP_1 15
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#define CLK_PP_DMU 16
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#define CLK_VID_DMU 17
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#define CLK_DSS_LPC 18
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#define CLK_ST231_AUD_0 19
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#define CLK_ST231_GP_0 19
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#define CLK_ST231_GP_1 20
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#define CLK_ST231_DMU 21
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#define CLK_ICN_LMI 22
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#define CLK_TX_ICN_DISP_0 23
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#define CLK_TX_ICN_DISP_1 23
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#define CLK_ICN_SBC 24
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#define CLK_STFE_FRC2 25
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#define CLK_ETH_PHY 26
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#define CLK_ETH_REF_PHYCLK 27
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#define CLK_FLASH_PROMIP 28
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#define CLK_MAIN_DISP 29
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#define CLK_AUX_DISP 30
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#define CLK_COMPO_DVP 31
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/* CLOCKGEN D0 */
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#define CLK_PCM_0 0
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#define CLK_PCM_1 1
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#define CLK_PCM_2 2
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#define CLK_SPDIFF 3
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/* CLOCKGEN D2 */
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#define CLK_PIX_MAIN_DISP 0
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#define CLK_PIX_PIP 1
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#define CLK_PIX_GDP1 2
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#define CLK_PIX_GDP2 3
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#define CLK_PIX_GDP3 4
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#define CLK_PIX_GDP4 5
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#define CLK_PIX_AUX_DISP 6
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#define CLK_DENC 7
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#define CLK_PIX_HDDAC 8
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#define CLK_HDDAC 9
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#define CLK_SDDAC 10
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#define CLK_PIX_DVO 11
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#define CLK_DVO 12
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#define CLK_PIX_HDMI 13
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#define CLK_TMDS_HDMI 14
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#define CLK_REF_HDMIPHY 15
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/* CLOCKGEN D3 */
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#define CLK_STFE_FRC1 0
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#define CLK_TSOUT_0 1
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#define CLK_TSOUT_1 2
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#define CLK_MCHI 3
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#define CLK_VSENS_COMPO 4
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#define CLK_FRC1_REMOTE 5
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#define CLK_LPC_0 6
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#define CLK_LPC_1 7
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#endif
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