101 lines
2.2 KiB
C
101 lines
2.2 KiB
C
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/*
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* Driver for Quantek QT1010 silicon tuner
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*
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* Copyright (C) 2006 Antti Palosaari <crope@iki.fi>
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* Aapo Tahkola <aet@rasterburn.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef QT1010_PRIV_H
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#define QT1010_PRIV_H
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/*
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reg def meaning
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=== === =======
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00 00 ?
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01 a0 ? operation start/stop; start=80, stop=00
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02 00 ?
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03 19 ?
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04 00 ?
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05 00 ? maybe band selection
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06 00 ?
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07 2b set frequency: 32 MHz scale, n*32 MHz
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08 0b ?
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09 10 ? changes every 8/24 MHz; values 1d/1c
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0a 08 set frequency: 4 MHz scale, n*4 MHz
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0b 41 ? changes every 2/2 MHz; values 45/45
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0c e1 ?
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0d 94 ?
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0e b6 ?
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0f 2c ?
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10 10 ?
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11 f1 ? maybe device specified adjustment
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12 11 ? maybe device specified adjustment
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13 3f ?
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14 1f ?
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15 3f ?
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16 ff ?
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17 ff ?
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18 f7 ?
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19 80 ?
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1a d0 set frequency: 125 kHz scale, n*125 kHz
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1b 00 ?
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1c 89 ?
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1d 00 ?
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1e 00 ? looks like operation register; write cmd here, read result from 1f-26
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1f 20 ? chip initialization
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20 e0 ? chip initialization
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21 20 ?
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22 d0 ?
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23 d0 ?
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24 d0 ?
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25 40 ? chip initialization
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26 08 ?
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27 29 ?
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28 55 ?
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29 39 ?
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2a 13 ?
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2b 01 ?
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2c ea ?
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2d 00 ?
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2e 00 ? not used?
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2f 00 ? not used?
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*/
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#define QT1010_STEP 125000 /* 125 kHz used by Windows drivers,
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hw could be more precise but we don't
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know how to use */
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#define QT1010_MIN_FREQ 48000000 /* 48 MHz */
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#define QT1010_MAX_FREQ 860000000 /* 860 MHz */
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#define QT1010_OFFSET 1246000000 /* 1246 MHz */
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#define QT1010_WR 0
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#define QT1010_RD 1
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#define QT1010_M1 3
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typedef struct {
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u8 oper, reg, val;
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} qt1010_i2c_oper_t;
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struct qt1010_priv {
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struct qt1010_config *cfg;
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struct i2c_adapter *i2c;
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u8 reg1f_init_val;
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u8 reg20_init_val;
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u8 reg25_init_val;
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u32 frequency;
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};
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#endif
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