345 lines
8.5 KiB
C
345 lines
8.5 KiB
C
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/*
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* Copyright(C) 2016 Linaro Limited. All rights reserved.
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* Author: Mathieu Poirier <mathieu.poirier@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/coresight.h>
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#include <linux/dma-mapping.h>
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#include "coresight-priv.h"
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#include "coresight-tmc.h"
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static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata)
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{
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u32 axictl, sts;
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/* Zero out the memory to help with debug */
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memset(drvdata->vaddr, 0, drvdata->size);
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CS_UNLOCK(drvdata->base);
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/* Wait for TMCSReady bit to be set */
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tmc_wait_for_tmcready(drvdata);
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writel_relaxed(drvdata->size / 4, drvdata->base + TMC_RSZ);
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writel_relaxed(TMC_MODE_CIRCULAR_BUFFER, drvdata->base + TMC_MODE);
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axictl = readl_relaxed(drvdata->base + TMC_AXICTL);
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axictl &= ~TMC_AXICTL_CLEAR_MASK;
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axictl |= (TMC_AXICTL_PROT_CTL_B1 | TMC_AXICTL_WR_BURST_16);
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axictl |= TMC_AXICTL_AXCACHE_OS;
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if (tmc_etr_has_cap(drvdata, TMC_ETR_AXI_ARCACHE)) {
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axictl &= ~TMC_AXICTL_ARCACHE_MASK;
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axictl |= TMC_AXICTL_ARCACHE_OS;
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}
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writel_relaxed(axictl, drvdata->base + TMC_AXICTL);
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tmc_write_dba(drvdata, drvdata->paddr);
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/*
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* If the TMC pointers must be programmed before the session,
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* we have to set it properly (i.e, RRP/RWP to base address and
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* STS to "not full").
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*/
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if (tmc_etr_has_cap(drvdata, TMC_ETR_SAVE_RESTORE)) {
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tmc_write_rrp(drvdata, drvdata->paddr);
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tmc_write_rwp(drvdata, drvdata->paddr);
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sts = readl_relaxed(drvdata->base + TMC_STS) & ~TMC_STS_FULL;
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writel_relaxed(sts, drvdata->base + TMC_STS);
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}
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writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI |
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TMC_FFCR_FON_FLIN | TMC_FFCR_FON_TRIG_EVT |
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TMC_FFCR_TRIGON_TRIGIN,
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drvdata->base + TMC_FFCR);
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writel_relaxed(drvdata->trigger_cntr, drvdata->base + TMC_TRG);
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tmc_enable_hw(drvdata);
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CS_LOCK(drvdata->base);
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}
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static void tmc_etr_dump_hw(struct tmc_drvdata *drvdata)
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{
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const u32 *barrier;
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u32 val;
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u32 *temp;
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u64 rwp;
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rwp = tmc_read_rwp(drvdata);
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val = readl_relaxed(drvdata->base + TMC_STS);
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/*
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* Adjust the buffer to point to the beginning of the trace data
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* and update the available trace data.
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*/
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if (val & TMC_STS_FULL) {
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drvdata->buf = drvdata->vaddr + rwp - drvdata->paddr;
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drvdata->len = drvdata->size;
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barrier = barrier_pkt;
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temp = (u32 *)drvdata->buf;
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while (*barrier) {
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*temp = *barrier;
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temp++;
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barrier++;
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}
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} else {
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drvdata->buf = drvdata->vaddr;
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drvdata->len = rwp - drvdata->paddr;
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}
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}
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static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata)
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{
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CS_UNLOCK(drvdata->base);
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tmc_flush_and_stop(drvdata);
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/*
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* When operating in sysFS mode the content of the buffer needs to be
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* read before the TMC is disabled.
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*/
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if (drvdata->mode == CS_MODE_SYSFS)
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tmc_etr_dump_hw(drvdata);
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tmc_disable_hw(drvdata);
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CS_LOCK(drvdata->base);
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}
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static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev)
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{
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int ret = 0;
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bool used = false;
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unsigned long flags;
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void __iomem *vaddr = NULL;
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dma_addr_t paddr;
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struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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/*
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* If we don't have a buffer release the lock and allocate memory.
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* Otherwise keep the lock and move along.
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*/
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spin_lock_irqsave(&drvdata->spinlock, flags);
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if (!drvdata->vaddr) {
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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/*
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* Contiguous memory can't be allocated while a spinlock is
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* held. As such allocate memory here and free it if a buffer
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* has already been allocated (from a previous session).
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*/
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vaddr = dma_alloc_coherent(drvdata->dev, drvdata->size,
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&paddr, GFP_KERNEL);
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if (!vaddr)
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return -ENOMEM;
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/* Let's try again */
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spin_lock_irqsave(&drvdata->spinlock, flags);
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}
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if (drvdata->reading) {
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ret = -EBUSY;
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goto out;
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}
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/*
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* In sysFS mode we can have multiple writers per sink. Since this
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* sink is already enabled no memory is needed and the HW need not be
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* touched.
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*/
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if (drvdata->mode == CS_MODE_SYSFS)
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goto out;
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/*
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* If drvdata::buf == NULL, use the memory allocated above.
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* Otherwise a buffer still exists from a previous session, so
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* simply use that.
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*/
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if (drvdata->buf == NULL) {
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used = true;
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drvdata->vaddr = vaddr;
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drvdata->paddr = paddr;
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drvdata->buf = drvdata->vaddr;
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}
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drvdata->mode = CS_MODE_SYSFS;
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tmc_etr_enable_hw(drvdata);
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out:
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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/* Free memory outside the spinlock if need be */
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if (!used && vaddr)
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dma_free_coherent(drvdata->dev, drvdata->size, vaddr, paddr);
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if (!ret)
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dev_info(drvdata->dev, "TMC-ETR enabled\n");
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return ret;
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}
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static int tmc_enable_etr_sink_perf(struct coresight_device *csdev)
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{
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int ret = 0;
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unsigned long flags;
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struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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spin_lock_irqsave(&drvdata->spinlock, flags);
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if (drvdata->reading) {
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ret = -EINVAL;
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goto out;
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}
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/*
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* In Perf mode there can be only one writer per sink. There
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* is also no need to continue if the ETR is already operated
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* from sysFS.
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*/
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if (drvdata->mode != CS_MODE_DISABLED) {
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ret = -EINVAL;
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goto out;
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}
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drvdata->mode = CS_MODE_PERF;
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tmc_etr_enable_hw(drvdata);
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out:
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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return ret;
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}
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static int tmc_enable_etr_sink(struct coresight_device *csdev, u32 mode)
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{
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switch (mode) {
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case CS_MODE_SYSFS:
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return tmc_enable_etr_sink_sysfs(csdev);
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case CS_MODE_PERF:
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return tmc_enable_etr_sink_perf(csdev);
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}
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/* We shouldn't be here */
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return -EINVAL;
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}
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static void tmc_disable_etr_sink(struct coresight_device *csdev)
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{
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unsigned long flags;
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struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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spin_lock_irqsave(&drvdata->spinlock, flags);
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if (drvdata->reading) {
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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return;
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}
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/* Disable the TMC only if it needs to */
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if (drvdata->mode != CS_MODE_DISABLED) {
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tmc_etr_disable_hw(drvdata);
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drvdata->mode = CS_MODE_DISABLED;
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}
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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dev_info(drvdata->dev, "TMC-ETR disabled\n");
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}
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static const struct coresight_ops_sink tmc_etr_sink_ops = {
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.enable = tmc_enable_etr_sink,
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.disable = tmc_disable_etr_sink,
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};
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const struct coresight_ops tmc_etr_cs_ops = {
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.sink_ops = &tmc_etr_sink_ops,
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};
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int tmc_read_prepare_etr(struct tmc_drvdata *drvdata)
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{
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int ret = 0;
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unsigned long flags;
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/* config types are set a boot time and never change */
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if (WARN_ON_ONCE(drvdata->config_type != TMC_CONFIG_TYPE_ETR))
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return -EINVAL;
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spin_lock_irqsave(&drvdata->spinlock, flags);
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if (drvdata->reading) {
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ret = -EBUSY;
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goto out;
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}
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/* Don't interfere if operated from Perf */
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if (drvdata->mode == CS_MODE_PERF) {
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ret = -EINVAL;
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goto out;
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}
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/* If drvdata::buf is NULL the trace data has been read already */
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if (drvdata->buf == NULL) {
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ret = -EINVAL;
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goto out;
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}
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/* Disable the TMC if need be */
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if (drvdata->mode == CS_MODE_SYSFS)
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tmc_etr_disable_hw(drvdata);
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drvdata->reading = true;
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out:
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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return ret;
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}
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int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata)
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{
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unsigned long flags;
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dma_addr_t paddr;
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void __iomem *vaddr = NULL;
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/* config types are set a boot time and never change */
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if (WARN_ON_ONCE(drvdata->config_type != TMC_CONFIG_TYPE_ETR))
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return -EINVAL;
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spin_lock_irqsave(&drvdata->spinlock, flags);
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/* RE-enable the TMC if need be */
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if (drvdata->mode == CS_MODE_SYSFS) {
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/*
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* The trace run will continue with the same allocated trace
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* buffer. The trace buffer is cleared in tmc_etr_enable_hw(),
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* so we don't have to explicitly clear it. Also, since the
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* tracer is still enabled drvdata::buf can't be NULL.
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*/
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tmc_etr_enable_hw(drvdata);
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} else {
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/*
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* The ETR is not tracing and the buffer was just read.
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* As such prepare to free the trace buffer.
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*/
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vaddr = drvdata->vaddr;
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paddr = drvdata->paddr;
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drvdata->buf = drvdata->vaddr = NULL;
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}
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drvdata->reading = false;
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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/* Free allocated memory out side of the spinlock */
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if (vaddr)
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dma_free_coherent(drvdata->dev, drvdata->size, vaddr, paddr);
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return 0;
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}
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