189 lines
7.9 KiB
C
189 lines
7.9 KiB
C
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/*
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* Copyright 2017 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef SMU10_H
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#define SMU10_H
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#pragma pack(push, 1)
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#define ENABLE_DEBUG_FEATURES
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/* Feature Control Defines */
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#define FEATURE_CCLK_CONTROLLER_BIT 0
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#define FEATURE_FAN_CONTROLLER_BIT 1
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#define FEATURE_DATA_CALCULATION_BIT 2
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#define FEATURE_PPT_BIT 3
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#define FEATURE_TDC_BIT 4
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#define FEATURE_THERMAL_BIT 5
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#define FEATURE_FIT_BIT 6
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#define FEATURE_EDC_BIT 7
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#define FEATURE_PLL_POWER_DOWN_BIT 8
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#define FEATURE_ULV_BIT 9
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#define FEATURE_VDDOFF_BIT 10
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#define FEATURE_VCN_DPM_BIT 11
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#define FEATURE_ACP_DPM_BIT 12
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#define FEATURE_ISP_DPM_BIT 13
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#define FEATURE_FCLK_DPM_BIT 14
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#define FEATURE_SOCCLK_DPM_BIT 15
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#define FEATURE_MP0CLK_DPM_BIT 16
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#define FEATURE_LCLK_DPM_BIT 17
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#define FEATURE_SHUBCLK_DPM_BIT 18
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#define FEATURE_DCEFCLK_DPM_BIT 19
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#define FEATURE_GFX_DPM_BIT 20
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#define FEATURE_DS_GFXCLK_BIT 21
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#define FEATURE_DS_SOCCLK_BIT 22
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#define FEATURE_DS_LCLK_BIT 23
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#define FEATURE_DS_DCEFCLK_BIT 24
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#define FEATURE_DS_SHUBCLK_BIT 25
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#define FEATURE_RM_BIT 26
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#define FEATURE_S0i2_BIT 27
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#define FEATURE_WHISPER_MODE_BIT 28
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#define FEATURE_DS_FCLK_BIT 29
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#define FEATURE_DS_SMNCLK_BIT 30
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#define FEATURE_DS_MP1CLK_BIT 31
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#define FEATURE_DS_MP0CLK_BIT 32
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#define FEATURE_MGCG_BIT 33
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#define FEATURE_DS_FUSE_SRAM_BIT 34
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#define FEATURE_GFX_CKS 35
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#define FEATURE_PSI0_BIT 36
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#define FEATURE_PROCHOT_BIT 37
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#define FEATURE_CPUOFF_BIT 38
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#define FEATURE_STAPM_BIT 39
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#define FEATURE_CORE_CSTATES_BIT 40
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#define FEATURE_SPARE_41_BIT 41
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#define FEATURE_SPARE_42_BIT 42
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#define FEATURE_SPARE_43_BIT 43
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#define FEATURE_SPARE_44_BIT 44
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#define FEATURE_SPARE_45_BIT 45
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#define FEATURE_SPARE_46_BIT 46
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#define FEATURE_SPARE_47_BIT 47
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#define FEATURE_SPARE_48_BIT 48
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#define FEATURE_SPARE_49_BIT 49
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#define FEATURE_SPARE_50_BIT 50
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#define FEATURE_SPARE_51_BIT 51
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#define FEATURE_SPARE_52_BIT 52
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#define FEATURE_SPARE_53_BIT 53
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#define FEATURE_SPARE_54_BIT 54
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#define FEATURE_SPARE_55_BIT 55
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#define FEATURE_SPARE_56_BIT 56
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#define FEATURE_SPARE_57_BIT 57
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#define FEATURE_SPARE_58_BIT 58
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#define FEATURE_SPARE_59_BIT 59
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#define FEATURE_SPARE_60_BIT 60
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#define FEATURE_SPARE_61_BIT 61
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#define FEATURE_SPARE_62_BIT 62
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#define FEATURE_SPARE_63_BIT 63
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#define NUM_FEATURES 64
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#define FEATURE_CCLK_CONTROLLER_MASK (1 << FEATURE_CCLK_CONTROLLER_BIT)
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#define FEATURE_FAN_CONTROLLER_MASK (1 << FEATURE_FAN_CONTROLLER_BIT)
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#define FEATURE_DATA_CALCULATION_MASK (1 << FEATURE_DATA_CALCULATION_BIT)
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#define FEATURE_PPT_MASK (1 << FEATURE_PPT_BIT)
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#define FEATURE_TDC_MASK (1 << FEATURE_TDC_BIT)
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#define FEATURE_THERMAL_MASK (1 << FEATURE_THERMAL_BIT)
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#define FEATURE_FIT_MASK (1 << FEATURE_FIT_BIT)
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#define FEATURE_EDC_MASK (1 << FEATURE_EDC_BIT)
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#define FEATURE_PLL_POWER_DOWN_MASK (1 << FEATURE_PLL_POWER_DOWN_BIT)
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#define FEATURE_ULV_MASK (1 << FEATURE_ULV_BIT)
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#define FEATURE_VDDOFF_MASK (1 << FEATURE_VDDOFF_BIT)
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#define FEATURE_VCN_DPM_MASK (1 << FEATURE_VCN_DPM_BIT)
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#define FEATURE_ACP_DPM_MASK (1 << FEATURE_ACP_DPM_BIT)
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#define FEATURE_ISP_DPM_MASK (1 << FEATURE_ISP_DPM_BIT)
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#define FEATURE_FCLK_DPM_MASK (1 << FEATURE_FCLK_DPM_BIT)
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#define FEATURE_SOCCLK_DPM_MASK (1 << FEATURE_SOCCLK_DPM_BIT)
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#define FEATURE_MP0CLK_DPM_MASK (1 << FEATURE_MP0CLK_DPM_BIT)
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#define FEATURE_LCLK_DPM_MASK (1 << FEATURE_LCLK_DPM_BIT)
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#define FEATURE_SHUBCLK_DPM_MASK (1 << FEATURE_SHUBCLK_DPM_BIT)
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#define FEATURE_DCEFCLK_DPM_MASK (1 << FEATURE_DCEFCLK_DPM_BIT)
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#define FEATURE_GFX_DPM_MASK (1 << FEATURE_GFX_DPM_BIT)
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#define FEATURE_DS_GFXCLK_MASK (1 << FEATURE_DS_GFXCLK_BIT)
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#define FEATURE_DS_SOCCLK_MASK (1 << FEATURE_DS_SOCCLK_BIT)
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#define FEATURE_DS_LCLK_MASK (1 << FEATURE_DS_LCLK_BIT)
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#define FEATURE_DS_DCEFCLK_MASK (1 << FEATURE_DS_DCEFCLK_BIT)
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#define FEATURE_DS_SHUBCLK_MASK (1 << FEATURE_DS_SHUBCLK_BIT)
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#define FEATURE_RM_MASK (1 << FEATURE_RM_BIT)
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#define FEATURE_DS_FCLK_MASK (1 << FEATURE_DS_FCLK_BIT)
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#define FEATURE_DS_SMNCLK_MASK (1 << FEATURE_DS_SMNCLK_BIT)
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#define FEATURE_DS_MP1CLK_MASK (1 << FEATURE_DS_MP1CLK_BIT)
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#define FEATURE_DS_MP0CLK_MASK (1 << FEATURE_DS_MP0CLK_BIT)
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#define FEATURE_MGCG_MASK (1 << FEATURE_MGCG_BIT)
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#define FEATURE_DS_FUSE_SRAM_MASK (1 << FEATURE_DS_FUSE_SRAM_BIT)
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#define FEATURE_PSI0_MASK (1 << FEATURE_PSI0_BIT)
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#define FEATURE_STAPM_MASK (1 << FEATURE_STAPM_BIT)
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#define FEATURE_PROCHOT_MASK (1 << FEATURE_PROCHOT_BIT)
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#define FEATURE_CPUOFF_MASK (1 << FEATURE_CPUOFF_BIT)
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#define FEATURE_CORE_CSTATES_MASK (1 << FEATURE_CORE_CSTATES_BIT)
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/* Workload bits */
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#define WORKLOAD_PPLIB_FULL_SCREEN_3D_BIT 0
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#define WORKLOAD_PPLIB_VIDEO_BIT 2
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#define WORKLOAD_PPLIB_VR_BIT 3
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#define WORKLOAD_PPLIB_COMPUTE_BIT 4
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#define WORKLOAD_PPLIB_CUSTOM_BIT 5
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#define WORKLOAD_PPLIB_COUNT 6
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typedef struct {
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/* MP1_EXT_SCRATCH0 */
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uint32_t CurrLevel_ACP : 4;
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uint32_t CurrLevel_ISP : 4;
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uint32_t CurrLevel_VCN : 4;
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uint32_t CurrLevel_LCLK : 4;
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uint32_t CurrLevel_MP0CLK : 4;
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uint32_t CurrLevel_FCLK : 4;
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uint32_t CurrLevel_SOCCLK : 4;
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uint32_t CurrLevel_DCEFCLK : 4;
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/* MP1_EXT_SCRATCH1 */
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uint32_t TargLevel_ACP : 4;
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uint32_t TargLevel_ISP : 4;
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uint32_t TargLevel_VCN : 4;
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uint32_t TargLevel_LCLK : 4;
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uint32_t TargLevel_MP0CLK : 4;
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uint32_t TargLevel_FCLK : 4;
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uint32_t TargLevel_SOCCLK : 4;
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uint32_t TargLevel_DCEFCLK : 4;
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/* MP1_EXT_SCRATCH2 */
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uint32_t CurrLevel_SHUBCLK : 4;
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uint32_t TargLevel_SHUBCLK : 4;
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uint32_t InUlv : 1;
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uint32_t InS0i2 : 1;
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uint32_t InWhisperMode : 1;
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uint32_t Reserved : 21;
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/* MP1_EXT_SCRATCH3-4 */
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uint32_t Reserved2[2];
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/* MP1_EXT_SCRATCH5 */
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uint32_t FeatureStatus[NUM_FEATURES / 32];
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} FwStatus_t;
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#define TABLE_BIOS_IF 0 /* Called by BIOS */
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#define TABLE_WATERMARKS 1 /* Called by Driver */
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#define TABLE_CUSTOM_DPM 2 /* Called by Driver */
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#define TABLE_PMSTATUSLOG 3 /* Called by Tools for Agm logging */
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#define TABLE_DPMCLOCKS 4 /* Called by Driver */
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#define TABLE_MOMENTARY_PM 5 /* Called by Tools */
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#define TABLE_COUNT 6
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#pragma pack(pop)
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#endif
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