194 lines
6.0 KiB
C
194 lines
6.0 KiB
C
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/*
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* Copyright 2017 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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/*
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* dc_helper.c
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*
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* Created on: Aug 30, 2016
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* Author: agrodzov
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*/
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#include "dm_services.h"
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#include <stdarg.h>
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uint32_t generic_reg_update_ex(const struct dc_context *ctx,
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uint32_t addr, uint32_t reg_val, int n,
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uint8_t shift1, uint32_t mask1, uint32_t field_value1,
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...)
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{
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uint32_t shift, mask, field_value;
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int i = 1;
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va_list ap;
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va_start(ap, field_value1);
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reg_val = set_reg_field_value_ex(reg_val, field_value1, mask1, shift1);
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while (i < n) {
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shift = va_arg(ap, uint32_t);
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mask = va_arg(ap, uint32_t);
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field_value = va_arg(ap, uint32_t);
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reg_val = set_reg_field_value_ex(reg_val, field_value, mask, shift);
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i++;
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}
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dm_write_reg(ctx, addr, reg_val);
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va_end(ap);
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return reg_val;
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}
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uint32_t generic_reg_get(const struct dc_context *ctx, uint32_t addr,
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uint8_t shift, uint32_t mask, uint32_t *field_value)
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{
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uint32_t reg_val = dm_read_reg(ctx, addr);
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*field_value = get_reg_field_value_ex(reg_val, mask, shift);
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return reg_val;
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}
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uint32_t generic_reg_get2(const struct dc_context *ctx, uint32_t addr,
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uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
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uint8_t shift2, uint32_t mask2, uint32_t *field_value2)
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{
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uint32_t reg_val = dm_read_reg(ctx, addr);
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*field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1);
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*field_value2 = get_reg_field_value_ex(reg_val, mask2, shift2);
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return reg_val;
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}
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uint32_t generic_reg_get3(const struct dc_context *ctx, uint32_t addr,
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uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
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uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
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uint8_t shift3, uint32_t mask3, uint32_t *field_value3)
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{
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uint32_t reg_val = dm_read_reg(ctx, addr);
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*field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1);
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*field_value2 = get_reg_field_value_ex(reg_val, mask2, shift2);
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*field_value3 = get_reg_field_value_ex(reg_val, mask3, shift3);
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return reg_val;
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}
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uint32_t generic_reg_get4(const struct dc_context *ctx, uint32_t addr,
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uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
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uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
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uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
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uint8_t shift4, uint32_t mask4, uint32_t *field_value4)
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{
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uint32_t reg_val = dm_read_reg(ctx, addr);
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*field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1);
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*field_value2 = get_reg_field_value_ex(reg_val, mask2, shift2);
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*field_value3 = get_reg_field_value_ex(reg_val, mask3, shift3);
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*field_value4 = get_reg_field_value_ex(reg_val, mask4, shift4);
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return reg_val;
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}
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uint32_t generic_reg_get5(const struct dc_context *ctx, uint32_t addr,
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uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
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uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
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uint8_t shift3, uint32_t mask3, uint32_t *field_value3,
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uint8_t shift4, uint32_t mask4, uint32_t *field_value4,
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uint8_t shift5, uint32_t mask5, uint32_t *field_value5)
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{
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uint32_t reg_val = dm_read_reg(ctx, addr);
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*field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1);
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*field_value2 = get_reg_field_value_ex(reg_val, mask2, shift2);
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*field_value3 = get_reg_field_value_ex(reg_val, mask3, shift3);
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*field_value4 = get_reg_field_value_ex(reg_val, mask4, shift4);
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*field_value5 = get_reg_field_value_ex(reg_val, mask5, shift5);
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return reg_val;
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}
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/* note: va version of this is pretty bad idea, since there is a output parameter pass by pointer
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* compiler won't be able to check for size match and is prone to stack corruption type of bugs
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uint32_t generic_reg_get(const struct dc_context *ctx,
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uint32_t addr, int n, ...)
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{
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uint32_t shift, mask;
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uint32_t *field_value;
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uint32_t reg_val;
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int i = 0;
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reg_val = dm_read_reg(ctx, addr);
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va_list ap;
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va_start(ap, n);
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while (i < n) {
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shift = va_arg(ap, uint32_t);
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mask = va_arg(ap, uint32_t);
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field_value = va_arg(ap, uint32_t *);
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*field_value = get_reg_field_value_ex(reg_val, mask, shift);
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i++;
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}
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va_end(ap);
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return reg_val;
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}
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*/
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uint32_t generic_reg_wait(const struct dc_context *ctx,
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uint32_t addr, uint32_t shift, uint32_t mask, uint32_t condition_value,
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unsigned int delay_between_poll_us, unsigned int time_out_num_tries,
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const char *func_name, int line)
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{
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uint32_t field_value;
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uint32_t reg_val;
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int i;
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/* something is terribly wrong if time out is > 200ms. (5Hz) */
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ASSERT(delay_between_poll_us * time_out_num_tries <= 200000);
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if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) {
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/* 35 seconds */
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delay_between_poll_us = 35000;
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time_out_num_tries = 1000;
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}
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for (i = 0; i <= time_out_num_tries; i++) {
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if (i) {
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if (delay_between_poll_us >= 1000)
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msleep(delay_between_poll_us/1000);
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else if (delay_between_poll_us > 0)
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udelay(delay_between_poll_us);
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}
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reg_val = dm_read_reg(ctx, addr);
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field_value = get_reg_field_value_ex(reg_val, mask, shift);
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if (field_value == condition_value)
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return reg_val;
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}
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dm_error("REG_WAIT timeout %dus * %d tries - %s line:%d\n",
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delay_between_poll_us, time_out_num_tries,
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func_name, line);
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if (!IS_FPGA_MAXIMUS_DC(ctx->dce_environment))
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BREAK_TO_DEBUGGER();
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return reg_val;
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}
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