298 lines
8.9 KiB
C
298 lines
8.9 KiB
C
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/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*
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* Do not include directly; use <linux/atomic.h>.
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*/
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#ifndef _ASM_TILE_ATOMIC_32_H
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#define _ASM_TILE_ATOMIC_32_H
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#include <asm/barrier.h>
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#include <arch/chip.h>
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#ifndef __ASSEMBLY__
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/**
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* atomic_add - add integer to atomic variable
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* @i: integer value to add
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* @v: pointer of type atomic_t
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*
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* Atomically adds @i to @v.
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*/
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static inline void atomic_add(int i, atomic_t *v)
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{
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_atomic_xchg_add(&v->counter, i);
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}
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#define ATOMIC_OPS(op) \
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unsigned long _atomic_fetch_##op(volatile unsigned long *p, unsigned long mask); \
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static inline void atomic_##op(int i, atomic_t *v) \
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{ \
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_atomic_fetch_##op((unsigned long *)&v->counter, i); \
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} \
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static inline int atomic_fetch_##op(int i, atomic_t *v) \
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{ \
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smp_mb(); \
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return _atomic_fetch_##op((unsigned long *)&v->counter, i); \
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}
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ATOMIC_OPS(and)
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ATOMIC_OPS(or)
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ATOMIC_OPS(xor)
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#undef ATOMIC_OPS
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static inline int atomic_fetch_add(int i, atomic_t *v)
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{
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smp_mb();
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return _atomic_xchg_add(&v->counter, i);
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}
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/**
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* atomic_add_return - add integer and return
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* @v: pointer of type atomic_t
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* @i: integer value to add
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*
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* Atomically adds @i to @v and returns @i + @v
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*/
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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smp_mb(); /* barrier for proper semantics */
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return _atomic_xchg_add(&v->counter, i) + i;
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}
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/**
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* __atomic_add_unless - add unless the number is already a given value
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* @v: pointer of type atomic_t
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* @a: the amount to add to v...
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* @u: ...unless v is equal to u.
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*
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* Atomically adds @a to @v, so long as @v was not already @u.
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* Returns the old value of @v.
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*/
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static inline int __atomic_add_unless(atomic_t *v, int a, int u)
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{
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smp_mb(); /* barrier for proper semantics */
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return _atomic_xchg_add_unless(&v->counter, a, u);
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}
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/**
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* atomic_set - set atomic variable
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* @v: pointer of type atomic_t
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* @i: required value
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*
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* Atomically sets the value of @v to @i.
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*
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* atomic_set() can't be just a raw store, since it would be lost if it
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* fell between the load and store of one of the other atomic ops.
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*/
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static inline void atomic_set(atomic_t *v, int n)
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{
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_atomic_xchg(&v->counter, n);
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}
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#define atomic_set_release(v, i) atomic_set((v), (i))
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/* A 64bit atomic type */
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typedef struct {
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long long counter;
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} atomic64_t;
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#define ATOMIC64_INIT(val) { (val) }
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/**
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* atomic64_read - read atomic variable
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* @v: pointer of type atomic64_t
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*
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* Atomically reads the value of @v.
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*/
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static inline long long atomic64_read(const atomic64_t *v)
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{
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/*
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* Requires an atomic op to read both 32-bit parts consistently.
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* Casting away const is safe since the atomic support routines
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* do not write to memory if the value has not been modified.
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*/
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return _atomic64_xchg_add((long long *)&v->counter, 0);
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}
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/**
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* atomic64_add - add integer to atomic variable
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* @i: integer value to add
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* @v: pointer of type atomic64_t
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*
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* Atomically adds @i to @v.
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*/
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static inline void atomic64_add(long long i, atomic64_t *v)
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{
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_atomic64_xchg_add(&v->counter, i);
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}
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#define ATOMIC64_OPS(op) \
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long long _atomic64_fetch_##op(long long *v, long long n); \
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static inline void atomic64_##op(long long i, atomic64_t *v) \
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{ \
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_atomic64_fetch_##op(&v->counter, i); \
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} \
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static inline long long atomic64_fetch_##op(long long i, atomic64_t *v) \
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{ \
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smp_mb(); \
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return _atomic64_fetch_##op(&v->counter, i); \
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}
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ATOMIC64_OPS(and)
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ATOMIC64_OPS(or)
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ATOMIC64_OPS(xor)
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#undef ATOMIC64_OPS
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static inline long long atomic64_fetch_add(long long i, atomic64_t *v)
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{
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smp_mb();
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return _atomic64_xchg_add(&v->counter, i);
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}
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/**
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* atomic64_add_return - add integer and return
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* @v: pointer of type atomic64_t
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* @i: integer value to add
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*
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* Atomically adds @i to @v and returns @i + @v
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*/
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static inline long long atomic64_add_return(long long i, atomic64_t *v)
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{
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smp_mb(); /* barrier for proper semantics */
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return _atomic64_xchg_add(&v->counter, i) + i;
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}
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/**
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* atomic64_add_unless - add unless the number is already a given value
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* @v: pointer of type atomic64_t
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* @a: the amount to add to v...
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* @u: ...unless v is equal to u.
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*
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* Atomically adds @a to @v, so long as @v was not already @u.
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* Returns non-zero if @v was not @u, and zero otherwise.
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*/
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static inline long long atomic64_add_unless(atomic64_t *v, long long a,
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long long u)
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{
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smp_mb(); /* barrier for proper semantics */
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return _atomic64_xchg_add_unless(&v->counter, a, u) != u;
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}
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/**
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* atomic64_set - set atomic variable
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* @v: pointer of type atomic64_t
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* @i: required value
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*
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* Atomically sets the value of @v to @i.
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*
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* atomic64_set() can't be just a raw store, since it would be lost if it
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* fell between the load and store of one of the other atomic ops.
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*/
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static inline void atomic64_set(atomic64_t *v, long long n)
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{
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_atomic64_xchg(&v->counter, n);
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}
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#define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0)
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#define atomic64_inc(v) atomic64_add(1LL, (v))
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#define atomic64_inc_return(v) atomic64_add_return(1LL, (v))
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#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
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#define atomic64_sub_return(i, v) atomic64_add_return(-(i), (v))
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#define atomic64_fetch_sub(i, v) atomic64_fetch_add(-(i), (v))
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#define atomic64_sub_and_test(a, v) (atomic64_sub_return((a), (v)) == 0)
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#define atomic64_sub(i, v) atomic64_add(-(i), (v))
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#define atomic64_dec(v) atomic64_sub(1LL, (v))
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#define atomic64_dec_return(v) atomic64_sub_return(1LL, (v))
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#define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0)
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#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1LL, 0LL)
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#endif /* !__ASSEMBLY__ */
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/*
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* Internal definitions only beyond this point.
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*/
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/*
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* Number of atomic locks in atomic_locks[]. Must be a power of two.
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* There is no reason for more than PAGE_SIZE / 8 entries, since that
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* is the maximum number of pointer bits we can use to index this.
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* And we cannot have more than PAGE_SIZE / 4, since this has to
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* fit on a single page and each entry takes 4 bytes.
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*/
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#define ATOMIC_HASH_SHIFT (PAGE_SHIFT - 3)
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#define ATOMIC_HASH_SIZE (1 << ATOMIC_HASH_SHIFT)
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#ifndef __ASSEMBLY__
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extern int atomic_locks[];
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#endif
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/*
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* All the code that may fault while holding an atomic lock must
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* place the pointer to the lock in ATOMIC_LOCK_REG so the fault code
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* can correctly release and reacquire the lock. Note that we
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* mention the register number in a comment in "lib/atomic_asm.S" to help
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* assembly coders from using this register by mistake, so if it
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* is changed here, change that comment as well.
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*/
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#define ATOMIC_LOCK_REG 20
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#define ATOMIC_LOCK_REG_NAME r20
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#ifndef __ASSEMBLY__
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/* Called from setup to initialize a hash table to point to per_cpu locks. */
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void __init_atomic_per_cpu(void);
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#ifdef CONFIG_SMP
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/* Support releasing the atomic lock in do_page_fault_ics(). */
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void __atomic_fault_unlock(int *lock_ptr);
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#endif
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/* Return a pointer to the lock for the given address. */
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int *__atomic_hashed_lock(volatile void *v);
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/* Private helper routines in lib/atomic_asm_32.S */
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struct __get_user {
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unsigned long val;
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int err;
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};
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extern struct __get_user __atomic32_cmpxchg(volatile int *p,
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int *lock, int o, int n);
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extern struct __get_user __atomic32_xchg(volatile int *p, int *lock, int n);
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extern struct __get_user __atomic32_xchg_add(volatile int *p, int *lock, int n);
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extern struct __get_user __atomic32_xchg_add_unless(volatile int *p,
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int *lock, int o, int n);
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extern struct __get_user __atomic32_fetch_or(volatile int *p, int *lock, int n);
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extern struct __get_user __atomic32_fetch_and(volatile int *p, int *lock, int n);
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extern struct __get_user __atomic32_fetch_andn(volatile int *p, int *lock, int n);
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extern struct __get_user __atomic32_fetch_xor(volatile int *p, int *lock, int n);
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extern long long __atomic64_cmpxchg(volatile long long *p, int *lock,
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long long o, long long n);
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extern long long __atomic64_xchg(volatile long long *p, int *lock, long long n);
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extern long long __atomic64_xchg_add(volatile long long *p, int *lock,
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long long n);
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extern long long __atomic64_xchg_add_unless(volatile long long *p,
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int *lock, long long o, long long n);
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extern long long __atomic64_fetch_and(volatile long long *p, int *lock, long long n);
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extern long long __atomic64_fetch_or(volatile long long *p, int *lock, long long n);
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extern long long __atomic64_fetch_xor(volatile long long *p, int *lock, long long n);
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/* Return failure from the atomic wrappers. */
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struct __get_user __atomic_bad_address(int __user *addr);
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#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_TILE_ATOMIC_32_H */
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