424 lines
11 KiB
Plaintext
424 lines
11 KiB
Plaintext
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/*
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* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "dra76x.dtsi"
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#include "dra7-evm-common.dtsi"
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#include <dt-bindings/net/ti-dp83867.h>
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/ {
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model = "TI DRA762 EVM";
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compatible = "ti,dra76-evm", "ti,dra762", "ti,dra7";
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x80000000 0x0 0x80000000>;
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};
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vsys_12v0: fixedregulator-vsys12v0 {
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/* main supply */
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compatible = "regulator-fixed";
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regulator-name = "vsys_12v0";
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vsys_5v0: fixedregulator-vsys5v0 {
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/* Output of Cntlr B of TPS43351-Q1 on dra76-evm */
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compatible = "regulator-fixed";
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regulator-name = "vsys_5v0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vsys_12v0>;
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regulator-always-on;
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regulator-boot-on;
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};
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vsys_3v3: fixedregulator-vsys3v3 {
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/* Output of Cntlr A of TPS43351-Q1 on dra76-evm */
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compatible = "regulator-fixed";
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regulator-name = "vsys_3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vsys_12v0>;
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regulator-always-on;
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regulator-boot-on;
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};
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vio_3v3: fixedregulator-vio_3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vio_3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vsys_3v3>;
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regulator-always-on;
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regulator-boot-on;
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};
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vio_3v3_sd: fixedregulator-sd {
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compatible = "regulator-fixed";
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regulator-name = "vio_3v3_sd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vio_3v3>;
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enable-active-high;
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gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
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};
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vio_1v8: fixedregulator-vio_1v8 {
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compatible = "regulator-fixed";
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regulator-name = "vio_1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&smps5_reg>;
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};
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vtt_fixed: fixedregulator-vtt {
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compatible = "regulator-fixed";
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regulator-name = "vtt_fixed";
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regulator-min-microvolt = <1350000>;
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regulator-max-microvolt = <1350000>;
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vin-supply = <&vsys_3v3>;
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regulator-always-on;
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regulator-boot-on;
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};
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aic_dvdd: fixedregulator-aic_dvdd {
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/* TPS77018DBVT */
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compatible = "regulator-fixed";
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regulator-name = "aic_dvdd";
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vin-supply = <&vio_3v3>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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};
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&dra7_pmx_core {
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mmc1_pins_default: mmc1_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
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DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
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DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
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DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
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DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
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DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
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DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
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>;
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};
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mmc1_pins_sdr12: pinmux_mmc1_sdr12_pins {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
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DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
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DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
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DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
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DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
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DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
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>;
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};
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mmc2_pins_default: mmc2_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
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DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
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DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
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DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
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DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
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DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
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DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
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DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
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DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
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DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
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>;
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};
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};
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&i2c1 {
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status = "okay";
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clock-frequency = <400000>;
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tps65917: tps65917@58 {
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compatible = "ti,tps65917";
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reg = <0x58>;
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ti,system-power-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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tps65917_pmic {
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compatible = "ti,tps65917-pmic";
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smps12-in-supply = <&vsys_3v3>;
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smps3-in-supply = <&vsys_3v3>;
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smps4-in-supply = <&vsys_3v3>;
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smps5-in-supply = <&vsys_3v3>;
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ldo1-in-supply = <&vsys_3v3>;
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ldo2-in-supply = <&vsys_3v3>;
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ldo3-in-supply = <&vsys_5v0>;
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ldo4-in-supply = <&vsys_5v0>;
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ldo5-in-supply = <&vsys_3v3>;
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tps65917_regulators: regulators {
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smps12_reg: smps12 {
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/* VDD_DSPEVE */
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regulator-name = "smps12";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1250000>;
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regulator-always-on;
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regulator-boot-on;
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};
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smps3_reg: smps3 {
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/* VDD_CORE */
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regulator-name = "smps3";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1250000>;
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regulator-boot-on;
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regulator-always-on;
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};
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smps4_reg: smps4 {
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/* VDD_IVA */
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regulator-name = "smps4";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1250000>;
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regulator-always-on;
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regulator-boot-on;
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};
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smps5_reg: smps5 {
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/* VDDS1V8 */
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regulator-name = "smps5";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo1_reg: ldo1 {
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/* LDO1_OUT --> VDA_PHY1_1V8 */
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regulator-name = "ldo1";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-allow-bypass;
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};
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ldo2_reg: ldo2 {
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/* LDO2_OUT --> VDA_PHY2_1V8 */
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regulator-name = "ldo2";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-allow-bypass;
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regulator-always-on;
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};
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ldo3_reg: ldo3 {
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/* VDA_USB_3V3 */
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regulator-name = "ldo3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo5_reg: ldo5 {
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/* VDDA_1V8_PLL */
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regulator-name = "ldo5";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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ldo4_reg: ldo4 {
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/* VDD_SDIO_DV */
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regulator-name = "ldo4";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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tps65917_power_button {
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compatible = "ti,palmas-pwrbutton";
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interrupt-parent = <&tps65917>;
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interrupts = <1 IRQ_TYPE_NONE>;
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wakeup-source;
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ti,palmas-long-press-seconds = <6>;
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};
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};
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lp87565: lp87565@60 {
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compatible = "ti,lp87565-q1";
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reg = <0x60>;
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buck10-in-supply =<&vsys_3v3>;
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buck23-in-supply =<&vsys_3v3>;
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regulators: regulators {
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buck10_reg: buck10 {
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/*VDD_MPU*/
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regulator-name = "buck10";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1250000>;
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regulator-always-on;
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regulator-boot-on;
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};
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buck23_reg: buck23 {
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/* VDD_GPU*/
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regulator-name = "buck23";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1250000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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pcf_lcd: pcf8757@20 {
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compatible = "ti,pcf8575", "nxp,pcf8575";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&gpio1>;
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interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
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};
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pcf_gpio_21: pcf8757@21 {
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compatible = "ti,pcf8575", "nxp,pcf8575";
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reg = <0x21>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gpio1>;
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interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pcf_hdmi: pcf8575@26 {
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compatible = "ti,pcf8575", "nxp,pcf8575";
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reg = <0x26>;
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gpio-controller;
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#gpio-cells = <2>;
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p1 {
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/* vin6_sel_s0: high: VIN6, low: audio */
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gpio-hog;
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gpios = <1 GPIO_ACTIVE_HIGH>;
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output-low;
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line-name = "vin6_sel_s0";
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};
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};
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tlv320aic3106: tlv320aic3106@19 {
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#sound-dai-cells = <0>;
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compatible = "ti,tlv320aic3106";
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reg = <0x19>;
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adc-settle-ms = <40>;
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ai3x-micbias-vg = <1>; /* 2.0V */
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status = "okay";
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/* Regulators */
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AVDD-supply = <&vio_3v3>;
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IOVDD-supply = <&vio_3v3>;
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DRVDD-supply = <&vio_3v3>;
|
||
|
|
DVDD-supply = <&aic_dvdd>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&cpu0 {
|
||
|
|
vdd-supply = <&buck10_reg>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&mmc1 {
|
||
|
|
status = "okay";
|
||
|
|
vmmc-supply = <&vio_3v3_sd>;
|
||
|
|
vmmc_aux-supply = <&ldo4_reg>;
|
||
|
|
bus-width = <4>;
|
||
|
|
/*
|
||
|
|
* SDCD signal is not being used here - using the fact that GPIO mode
|
||
|
|
* is always hardwired.
|
||
|
|
*/
|
||
|
|
cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&mmc1_pins_default>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&mmc2 {
|
||
|
|
status = "okay";
|
||
|
|
vmmc-supply = <&vio_1v8>;
|
||
|
|
bus-width = <8>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&mmc2_pins_default>;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* No RTC on this device */
|
||
|
|
&rtc {
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
&mac {
|
||
|
|
status = "okay";
|
||
|
|
|
||
|
|
dual_emac;
|
||
|
|
};
|
||
|
|
|
||
|
|
&cpsw_emac0 {
|
||
|
|
phy_id = <&davinci_mdio>, <2>;
|
||
|
|
phy-mode = "rgmii-id";
|
||
|
|
dual_emac_res_vlan = <1>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&cpsw_emac1 {
|
||
|
|
phy_id = <&davinci_mdio>, <3>;
|
||
|
|
phy-mode = "rgmii-id";
|
||
|
|
dual_emac_res_vlan = <2>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&davinci_mdio {
|
||
|
|
dp83867_0: ethernet-phy@2 {
|
||
|
|
reg = <2>;
|
||
|
|
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
|
||
|
|
ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
|
||
|
|
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
|
||
|
|
ti,min-output-impedance;
|
||
|
|
ti,dp83867-rxctrl-strap-quirk;
|
||
|
|
};
|
||
|
|
|
||
|
|
dp83867_1: ethernet-phy@3 {
|
||
|
|
reg = <3>;
|
||
|
|
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
|
||
|
|
ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
|
||
|
|
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
|
||
|
|
ti,min-output-impedance;
|
||
|
|
ti,dp83867-rxctrl-strap-quirk;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&usb2_phy1 {
|
||
|
|
phy-supply = <&ldo3_reg>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&usb2_phy2 {
|
||
|
|
phy-supply = <&ldo3_reg>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&qspi {
|
||
|
|
spi-max-frequency = <96000000>;
|
||
|
|
m25p80@0 {
|
||
|
|
spi-max-frequency = <96000000>;
|
||
|
|
};
|
||
|
|
};
|