40 lines
1.7 KiB
Plaintext
40 lines
1.7 KiB
Plaintext
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+Mediatek MT65xx/MT67xx/MT81xx sysirq
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Mediatek SOCs sysirq support controllable irq inverter for each GIC SPI
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interrupt.
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Required properties:
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- compatible: should be
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"mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173
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"mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135
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"mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127
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"mediatek,mt7622-sysirq", "mediatek,mt6577-sysirq": for MT7622
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"mediatek,mt6795-sysirq", "mediatek,mt6577-sysirq": for MT6795
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"mediatek,mt6797-sysirq", "mediatek,mt6577-sysirq": for MT6797
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"mediatek,mt6755-sysirq", "mediatek,mt6577-sysirq": for MT6755
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"mediatek,mt6592-sysirq", "mediatek,mt6577-sysirq": for MT6592
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"mediatek,mt6589-sysirq", "mediatek,mt6577-sysirq": for MT6589
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"mediatek,mt6582-sysirq", "mediatek,mt6577-sysirq": for MT6582
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"mediatek,mt6580-sysirq", "mediatek,mt6577-sysirq": for MT6580
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"mediatek,mt6577-sysirq": for MT6577
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"mediatek,mt2712-sysirq", "mediatek,mt6577-sysirq": for MT2712
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"mediatek,mt2701-sysirq", "mediatek,mt6577-sysirq": for MT2701
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- interrupt-controller : Identifies the node as an interrupt controller
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- #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt.
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- interrupt-parent: phandle of irq parent for sysirq. The parent must
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use the same interrupt-cells format as GIC.
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- reg: Physical base address of the intpol registers and length of memory
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mapped region. Could be multiple bases here. Ex: mt6797 needs 2 reg, others
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need 1.
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Example:
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sysirq: intpol-controller@10200620 {
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compatible = "mediatek,mt6797-sysirq",
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"mediatek,mt6577-sysirq";
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interrupt-controller;
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#interrupt-cells = <3>;
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interrupt-parent = <&gic>;
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reg = <0 0x10220620 0 0x20>,
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<0 0x10220690 0 0x10>;
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};
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