33 lines
1.3 KiB
Plaintext
33 lines
1.3 KiB
Plaintext
|
QCOM Secure Channel Manager (SCM)
|
||
|
|
|
||
|
|
Qualcomm processors include an interface to communicate to the secure firmware.
|
||
|
|
This interface allows for clients to request different types of actions. These
|
||
|
|
can include CPU power up/down, HDCP requests, loading of firmware, and other
|
||
|
|
assorted actions.
|
||
|
|
|
||
|
|
Required properties:
|
||
|
|
- compatible: must contain one of the following:
|
||
|
|
* "qcom,scm-apq8064" for APQ8064 platforms
|
||
|
|
* "qcom,scm-msm8660" for MSM8660 platforms
|
||
|
|
* "qcom,scm-msm8690" for MSM8690 platforms
|
||
|
|
* "qcom,scm-msm8996" for MSM8996 platforms
|
||
|
|
* "qcom,scm" for later processors (MSM8916, APQ8084, MSM8974, etc)
|
||
|
|
- clocks: One to three clocks may be required based on compatible.
|
||
|
|
* No clock required for "qcom,scm-msm8996"
|
||
|
|
* Only core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660", and "qcom,scm-msm8960"
|
||
|
|
* Core, iface, and bus clocks required for "qcom,scm"
|
||
|
|
- clock-names: Must contain "core" for the core clock, "iface" for the interface
|
||
|
|
clock and "bus" for the bus clock per the requirements of the compatible.
|
||
|
|
- qcom,dload-mode: phandle to the TCSR hardware block and offset of the
|
||
|
|
download mode control register (optional)
|
||
|
|
|
||
|
|
Example for MSM8916:
|
||
|
|
|
||
|
|
firmware {
|
||
|
|
scm {
|
||
|
|
compatible = "qcom,scm";
|
||
|
|
clocks = <&gcc GCC_CRYPTO_CLK> , <&gcc GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_AHB_CLK>;
|
||
|
|
clock-names = "core", "bus", "iface";
|
||
|
|
};
|
||
|
|
};
|