126 lines
5.0 KiB
Modula-2
126 lines
5.0 KiB
Modula-2
/* Definitions of target machine for GCC for IA-32.
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Copyright (C) 2002-2021 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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/* The x86_64 ABI specifies both XF and TF modes.
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XFmode is __float80 is IEEE extended; TFmode is __float128
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is IEEE quad. */
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FRACTIONAL_FLOAT_MODE (XF, 80, 12, ieee_extended_intel_96_format);
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FLOAT_MODE (TF, 16, ieee_quad_format);
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/* In ILP32 mode, XFmode has size 12 and alignment 4.
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In LP64 mode, XFmode has size and alignment 16. */
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ADJUST_FLOAT_FORMAT (XF, (TARGET_128BIT_LONG_DOUBLE
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? &ieee_extended_intel_128_format
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: TARGET_96_ROUND_53_LONG_DOUBLE
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? &ieee_extended_intel_96_round_53_format
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: &ieee_extended_intel_96_format));
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ADJUST_BYTESIZE (XF, TARGET_128BIT_LONG_DOUBLE ? 16 : 12);
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ADJUST_ALIGNMENT (XF, TARGET_128BIT_LONG_DOUBLE ? 16 : 4);
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/* Add any extra modes needed to represent the condition code.
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For the i386, we need separate modes when floating-point
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equality comparisons are being done.
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Add CCNO to indicate comparisons against zero that require
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Overflow flag to be unset. Sign bit test is used instead and
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thus can be used to form "a&b>0" type of tests.
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Add CCGC to indicate comparisons against zero that allow
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unspecified garbage in the Carry flag. This mode is used
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by inc/dec instructions.
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Add CCGOC to indicate comparisons against zero that allow
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unspecified garbage in the Carry and Overflow flag. This
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mode is used to simulate comparisons of (a-b) and (a+b)
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against zero using sub/cmp/add operations.
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Add CCGZ to indicate comparisons that allow unspecified garbage
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in the Zero flag. This mode is used in double-word comparisons.
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Add CCA to indicate that only the Above flag is valid.
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Add CCC to indicate that only the Carry flag is valid.
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Add CCO to indicate that only the Overflow flag is valid.
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Add CCP to indicate that only the Parity flag is valid.
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Add CCS to indicate that only the Sign flag is valid.
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Add CCZ to indicate that only the Zero flag is valid. */
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CC_MODE (CCGC);
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CC_MODE (CCGOC);
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CC_MODE (CCNO);
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CC_MODE (CCGZ);
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CC_MODE (CCA);
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CC_MODE (CCC);
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CC_MODE (CCO);
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CC_MODE (CCP);
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CC_MODE (CCS);
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CC_MODE (CCZ);
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CC_MODE (CCFP);
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/* Vector modes. Note that VEC_CONCAT patterns require vector
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sizes twice as big as implemented in hardware. */
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VECTOR_MODES (INT, 4); /* V4QI V2HI */
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VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI */
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VECTOR_MODES (INT, 16); /* V16QI V8HI V4SI V2DI */
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VECTOR_MODES (INT, 32); /* V32QI V16HI V8SI V4DI */
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VECTOR_MODES (INT, 64); /* V64QI V32HI V16SI V8DI */
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VECTOR_MODES (INT, 128); /* V128QI V64HI V32SI V16DI */
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VECTOR_MODES (FLOAT, 8); /* V2SF */
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VECTOR_MODES (FLOAT, 16); /* V4SF V2DF */
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VECTOR_MODES (FLOAT, 32); /* V8SF V4DF V2TF */
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VECTOR_MODES (FLOAT, 64); /* V16SF V8DF V4TF */
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VECTOR_MODES (FLOAT, 128); /* V32SF V16DF V8TF */
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VECTOR_MODES (FLOAT, 256); /* V64SF V32DF V16TF */
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VECTOR_MODE (INT, TI, 1); /* V1TI */
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VECTOR_MODE (INT, DI, 1); /* V1DI */
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VECTOR_MODE (INT, SI, 1); /* V1SI */
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VECTOR_MODE (INT, QI, 2); /* V2QI */
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VECTOR_MODE (INT, QI, 12); /* V12QI */
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VECTOR_MODE (INT, QI, 14); /* V14QI */
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VECTOR_MODE (INT, HI, 6); /* V6HI */
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VECTOR_MODE (INT, SI, 64); /* V64SI */
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INT_MODE (OI, 32);
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INT_MODE (XI, 64);
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/* Modes needs a consecutive register pair.
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Note that Using PARTIAL_INT_MODE but not INT_MODE is to avoid mode promotion
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issues. */
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PARTIAL_INT_MODE (HI, 16, P2QI);
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PARTIAL_INT_MODE (SI, 32, P2HI);
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/* Mode used for signed overflow checking of TImode. As
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MAX_BITSIZE_MODE_ANY_INT is only 160, wide-int.h reserves only that
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rounded up to multiple of HOST_BITS_PER_WIDE_INT bits in wide_int etc.,
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so OImode is too large. For the overflow checking we actually need
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just 1 or 2 bits beyond TImode precision. Use 160 bits to have
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a multiple of 32. */
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PARTIAL_INT_MODE (OI, 160, POI);
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/* Keep the OI and XI modes from confusing the compiler into thinking
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that these modes could actually be used for computation. They are
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only holders for vectors during data movement. Include POImode precision
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though. */
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#define MAX_BITSIZE_MODE_ANY_INT (160)
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/* The symbol Pmode stands for one of the above machine modes (usually SImode).
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The tm.h file specifies which one. It is not a distinct mode. */
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