538 lines
10 KiB
ArmAsm
538 lines
10 KiB
ArmAsm
/* Optimized memcpy implementation for PowerPC32/POWER7.
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Copyright (C) 2010-2022 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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/* void * [r3] memcpy (void *dst [r3], void *src [r4], size_t len [r5]);
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Returns 'dst'. */
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.machine power7
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EALIGN (memcpy, 5, 0)
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CALL_MCOUNT
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stwu 1,-32(1)
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cfi_adjust_cfa_offset(32)
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stw 30,20(1)
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cfi_offset(30,(20-32))
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stw 31,24(1)
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mr 30,3
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cmplwi cr1,5,31
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neg 0,3
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cfi_offset(31,-8)
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ble cr1, L(copy_LT_32) /* If move < 32 bytes use short move
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code. */
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andi. 11,3,15 /* Check alignment of DST. */
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clrlwi 10,4,28 /* Check alignment of SRC. */
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cmplw cr6,10,11 /* SRC and DST alignments match? */
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mr 12,4
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mr 31,5
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bne cr6,L(copy_GE_32_unaligned)
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srwi 9,5,3 /* Number of full quadwords remaining. */
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beq L(copy_GE_32_aligned_cont)
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clrlwi 0,0,29
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mtcrf 0x01,0
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subf 31,0,5
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/* Get the SRC aligned to 8 bytes. */
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1: bf 31,2f
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lbz 6,0(12)
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addi 12,12,1
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stb 6,0(3)
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addi 3,3,1
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2: bf 30,4f
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lhz 6,0(12)
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addi 12,12,2
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sth 6,0(3)
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addi 3,3,2
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4: bf 29,0f
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lwz 6,0(12)
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addi 12,12,4
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stw 6,0(3)
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addi 3,3,4
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0:
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clrlwi 10,12,29 /* Check alignment of SRC again. */
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srwi 9,31,3 /* Number of full doublewords remaining. */
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L(copy_GE_32_aligned_cont):
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clrlwi 11,31,29
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mtcrf 0x01,9
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srwi 8,31,5
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cmplwi cr1,9,4
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cmplwi cr6,11,0
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mr 11,12
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/* Copy 1~3 doublewords so the main loop starts
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at a multiple of 32 bytes. */
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bf 30,1f
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lfd 6,0(12)
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lfd 7,8(12)
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addi 11,12,16
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mtctr 8
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stfd 6,0(3)
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stfd 7,8(3)
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addi 10,3,16
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bf 31,4f
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lfd 0,16(12)
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stfd 0,16(3)
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blt cr1,3f
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addi 11,12,24
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addi 10,3,24
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b 4f
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.align 4
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1: /* Copy 1 doubleword and set the counter. */
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mr 10,3
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mtctr 8
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bf 31,4f
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lfd 6,0(12)
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addi 11,12,8
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stfd 6,0(3)
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addi 10,3,8
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L(aligned_copy):
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/* Main aligned copy loop. Copies up to 128-bytes at a time. */
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.align 4
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4:
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/* check for any 32-byte or 64-byte lumps that are outside of a
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nice 128-byte range. R8 contains the number of 32-byte
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lumps, so drop this into the CR, and use the SO/EQ bits to help
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handle the 32- or 64- byte lumps. Then handle the rest with an
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unrolled 128-bytes-at-a-time copy loop. */
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mtocrf 1,8
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li 6,16 # 16() index
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li 7,32 # 32() index
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li 8,48 # 48() index
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L(aligned_32byte):
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/* if the SO bit (indicating a 32-byte lump) is not set, move along. */
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bns cr7,L(aligned_64byte)
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lxvd2x 6,0,11
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lxvd2x 7,11,6
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addi 11,11,32
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stxvd2x 6,0,10
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stxvd2x 7,10,6
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addi 10,10,32
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L(aligned_64byte):
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/* if the EQ bit (indicating a 64-byte lump) is not set, move along. */
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bne cr7,L(aligned_128setup)
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lxvd2x 6,0,11
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lxvd2x 7,11,6
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lxvd2x 8,11,7
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lxvd2x 9,11,8
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addi 11,11,64
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stxvd2x 6,0,10
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stxvd2x 7,10,6
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stxvd2x 8,10,7
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stxvd2x 9,10,8
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addi 10,10,64
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L(aligned_128setup):
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/* Set up for the 128-byte at a time copy loop. */
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srwi 8,31,7
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cmpwi 8,0 # Any 4x lumps left?
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beq 3f # if not, move along.
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lxvd2x 6,0,11
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lxvd2x 7,11,6
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mtctr 8 # otherwise, load the ctr and begin.
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li 8,48 # 48() index
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b L(aligned_128loop)
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L(aligned_128head):
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/* for the 2nd + iteration of this loop. */
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lxvd2x 6,0,11
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lxvd2x 7,11,6
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L(aligned_128loop):
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lxvd2x 8,11,7
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lxvd2x 9,11,8
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stxvd2x 6,0,10
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addi 11,11,64
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stxvd2x 7,10,6
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stxvd2x 8,10,7
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stxvd2x 9,10,8
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lxvd2x 6,0,11
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lxvd2x 7,11,6
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addi 10,10,64
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lxvd2x 8,11,7
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lxvd2x 9,11,8
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addi 11,11,64
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stxvd2x 6,0,10
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stxvd2x 7,10,6
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stxvd2x 8,10,7
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stxvd2x 9,10,8
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addi 10,10,64
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bdnz L(aligned_128head)
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3:
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/* Check for tail bytes. */
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clrrwi 0,31,3
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mtcrf 0x01,31
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beq cr6,0f
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.L9:
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add 3,3,0
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add 12,12,0
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/* At this point we have a tail of 0-7 bytes and we know that the
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destination is doubleword-aligned. */
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4: /* Copy 4 bytes. */
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bf 29,2f
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lwz 6,0(12)
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addi 12,12,4
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stw 6,0(3)
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addi 3,3,4
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2: /* Copy 2 bytes. */
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bf 30,1f
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lhz 6,0(12)
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addi 12,12,2
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sth 6,0(3)
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addi 3,3,2
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1: /* Copy 1 byte. */
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bf 31,0f
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lbz 6,0(12)
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stb 6,0(3)
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0: /* Return original DST pointer. */
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mr 3,30
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lwz 30,20(1)
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lwz 31,24(1)
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addi 1,1,32
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blr
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/* Handle copies of 0~31 bytes. */
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.align 4
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L(copy_LT_32):
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cmplwi cr6,5,8
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mr 12,4
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mtcrf 0x01,5
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ble cr6,L(copy_LE_8)
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/* At least 9 bytes to go. */
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neg 8,4
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clrrwi 11,4,2
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andi. 0,8,3
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cmplwi cr1,5,16
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mr 10,5
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beq L(copy_LT_32_aligned)
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/* Force 4-bytes alignment for SRC. */
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mtocrf 0x01,0
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subf 10,0,5
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2: bf 30,1f
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lhz 6,0(12)
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addi 12,12,2
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sth 6,0(3)
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addi 3,3,2
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1: bf 31,L(end_4bytes_alignment)
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lbz 6,0(12)
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addi 12,12,1
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stb 6,0(3)
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addi 3,3,1
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.align 4
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L(end_4bytes_alignment):
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cmplwi cr1,10,16
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mtcrf 0x01,10
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L(copy_LT_32_aligned):
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/* At least 6 bytes to go, and SRC is word-aligned. */
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blt cr1,8f
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/* Copy 16 bytes. */
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lwz 6,0(12)
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lwz 7,4(12)
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stw 6,0(3)
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lwz 8,8(12)
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stw 7,4(3)
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lwz 6,12(12)
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addi 12,12,16
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stw 8,8(3)
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stw 6,12(3)
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addi 3,3,16
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8: /* Copy 8 bytes. */
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bf 28,4f
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lwz 6,0(12)
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lwz 7,4(12)
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addi 12,12,8
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stw 6,0(3)
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stw 7,4(3)
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addi 3,3,8
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4: /* Copy 4 bytes. */
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bf 29,2f
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lwz 6,0(12)
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addi 12,12,4
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stw 6,0(3)
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addi 3,3,4
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2: /* Copy 2-3 bytes. */
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bf 30,1f
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lhz 6,0(12)
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sth 6,0(3)
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bf 31,0f
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lbz 7,2(12)
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stb 7,2(3)
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/* Return original DST pointer. */
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mr 3,30
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lwz 30,20(1)
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addi 1,1,32
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blr
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.align 4
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1: /* Copy 1 byte. */
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bf 31,0f
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lbz 6,0(12)
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stb 6,0(3)
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0: /* Return original DST pointer. */
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mr 3,30
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lwz 30,20(1)
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addi 1,1,32
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blr
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/* Handles copies of 0~8 bytes. */
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.align 4
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L(copy_LE_8):
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bne cr6,4f
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/* Though we could've used lfd/stfd here, they are still
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slow for unaligned cases. */
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lwz 6,0(4)
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lwz 7,4(4)
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stw 6,0(3)
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stw 7,4(3)
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/* Return original DST pointer. */
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mr 3,30
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lwz 30,20(1)
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addi 1,1,32
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blr
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.align 4
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4: /* Copies 4~7 bytes. */
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bf 29,2b
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lwz 6,0(4)
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stw 6,0(3)
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bf 30,5f
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lhz 7,4(4)
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sth 7,4(3)
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bf 31,0f
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lbz 8,6(4)
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stb 8,6(3)
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/* Return original DST pointer. */
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mr 3,30
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lwz 30,20(1)
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addi 1,1,32
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blr
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.align 4
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5: /* Copy 1 byte. */
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bf 31,0f
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lbz 6,4(4)
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stb 6,4(3)
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0: /* Return original DST pointer. */
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mr 3,30
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lwz 30,20(1)
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addi 1,1,32
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blr
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/* Handle copies of 32+ bytes where DST is aligned (to quadword) but
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SRC is not. Use aligned quadword loads from SRC, shifted to realign
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the data, allowing for aligned DST stores. */
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.align 4
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L(copy_GE_32_unaligned):
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andi. 11,3,15 /* Check alignment of DST. */
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clrlwi 0,0,28 /* Number of bytes until the 1st
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quadword of DST. */
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srwi 9,5,4 /* Number of full quadwords remaining. */
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beq L(copy_GE_32_unaligned_cont)
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/* DST is not quadword aligned, get it aligned. */
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mtcrf 0x01,0
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subf 31,0,5
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/* Vector instructions work best when proper alignment (16-bytes)
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is present. Move 0~15 bytes as needed to get DST quadword-aligned. */
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1: /* Copy 1 byte. */
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bf 31,2f
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lbz 6,0(12)
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addi 12,12,1
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stb 6,0(3)
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addi 3,3,1
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2: /* Copy 2 bytes. */
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bf 30,4f
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lhz 6,0(12)
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addi 12,12,2
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sth 6,0(3)
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addi 3,3,2
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4: /* Copy 4 bytes. */
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bf 29,8f
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lwz 6,0(12)
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addi 12,12,4
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stw 6,0(3)
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addi 3,3,4
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8: /* Copy 8 bytes. */
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bf 28,0f
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lfd 6,0(12)
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addi 12,12,8
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stfd 6,0(3)
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addi 3,3,8
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0:
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clrlwi 10,12,28 /* Check alignment of SRC. */
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srwi 9,31,4 /* Number of full quadwords remaining. */
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/* The proper alignment is present, it is OK to copy the bytes now. */
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L(copy_GE_32_unaligned_cont):
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/* Setup two indexes to speed up the indexed vector operations. */
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clrlwi 11,31,28
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li 6,16 /* Index for 16-bytes offsets. */
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li 7,32 /* Index for 32-bytes offsets. */
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cmplwi cr1,11,0
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srwi 8,31,5 /* Setup the loop counter. */
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mr 10,3
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mr 11,12
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mtcrf 0x01,9
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cmplwi cr6,9,1
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#ifdef __LITTLE_ENDIAN__
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lvsr 5,0,12
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#else
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lvsl 5,0,12
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#endif
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lvx 3,0,12
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bf 31,L(setup_unaligned_loop)
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/* Copy another 16 bytes to align to 32-bytes due to the loop . */
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lvx 4,12,6
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#ifdef __LITTLE_ENDIAN__
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vperm 6,4,3,5
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#else
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vperm 6,3,4,5
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#endif
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addi 11,12,16
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addi 10,3,16
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stvx 6,0,3
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vor 3,4,4
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L(setup_unaligned_loop):
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mtctr 8
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ble cr6,L(end_unaligned_loop)
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/* Copy 32 bytes at a time using vector instructions. */
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.align 4
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L(unaligned_loop):
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/* Note: vr6/vr10 may contain data that was already copied,
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but in order to get proper alignment, we may have to copy
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some portions again. This is faster than having unaligned
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vector instructions though. */
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lvx 4,11,6 /* vr4 = r11+16. */
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#ifdef __LITTLE_ENDIAN__
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vperm 6,4,3,5
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#else
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vperm 6,3,4,5
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#endif
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lvx 3,11,7 /* vr3 = r11+32. */
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#ifdef __LITTLE_ENDIAN__
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vperm 10,3,4,5
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#else
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vperm 10,4,3,5
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#endif
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addi 11,11,32
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stvx 6,0,10
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stvx 10,10,6
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addi 10,10,32
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bdnz L(unaligned_loop)
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.align 4
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L(end_unaligned_loop):
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/* Check for tail bytes. */
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clrrwi 0,31,4
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mtcrf 0x01,31
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beq cr1,0f
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add 3,3,0
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add 12,12,0
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/* We have 1~15 tail bytes to copy, and DST is quadword aligned. */
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8: /* Copy 8 bytes. */
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bf 28,4f
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lwz 6,0(12)
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lwz 7,4(12)
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addi 12,12,8
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stw 6,0(3)
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stw 7,4(3)
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addi 3,3,8
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4: /* Copy 4 bytes. */
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bf 29,2f
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lwz 6,0(12)
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addi 12,12,4
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stw 6,0(3)
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addi 3,3,4
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2: /* Copy 2~3 bytes. */
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bf 30,1f
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lhz 6,0(12)
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addi 12,12,2
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sth 6,0(3)
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addi 3,3,2
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1: /* Copy 1 byte. */
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bf 31,0f
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lbz 6,0(12)
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stb 6,0(3)
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0: /* Return original DST pointer. */
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mr 3,30
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lwz 30,20(1)
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lwz 31,24(1)
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addi 1,1,32
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blr
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END (memcpy)
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libc_hidden_builtin_def (memcpy)
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