548 lines
11 KiB
Plaintext
548 lines
11 KiB
Plaintext
/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
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/*
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* Copyright (C) STMicroelectronics 2020 - All Rights Reserved
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* Author: STM32CubeMX code generation for STMicroelectronics.
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*/
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/dts-v1/;
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#include <dt-bindings/pinctrl/stm32-pinfunc.h>
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#include <dt-bindings/clock/stm32mp1-clksrc.h>
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#include <dt-bindings/soc/st,stm32-etzpc.h>
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#include <dt-bindings/power/stm32mp1-power.h>
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#include "stm32mp157.dtsi"
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#include "stm32mp15xc.dtsi"
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#include "stm32mp15xxac-pinctrl.dtsi"
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#include "osd32mp1_ddr_1x4Gb.dtsi"
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/ {
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model = "Octavo OSD32MP1 BRK board";
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compatible = "st,stm32mp157c-osd32mp1-brk", "st,stm32mp157";
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aliases {
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serial0 = &uart4;
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};
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memory@c0000000 {
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device_type = "memory";
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reg = <0xc0000000 0x20000000>;
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};
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vin: vin {
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compatible = "regulator-fixed";
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regulator-name = "vin";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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&bsec {
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board_id: board_id@ec {
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reg = <0xec 0x4>;
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st,non-secure-otp;
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};
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};
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&clk_hse {
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st,digbypass;
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};
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&cpu0 {
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cpu-supply = <&vddcore>;
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};
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&cpu1 {
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cpu-supply = <&vddcore>;
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};
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&hash1 {
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status = "okay";
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};
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&cryp1 {
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status = "okay";
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};
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&etzpc {
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st,decprot = <
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DECPROT(STM32MP1_ETZPC_USART1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)
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DECPROT(STM32MP1_ETZPC_SPI6_ID, DECPROT_NS_RW, DECPROT_UNLOCK)
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DECPROT(STM32MP1_ETZPC_I2C4_ID, DECPROT_NS_RW, DECPROT_UNLOCK)
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DECPROT(STM32MP1_ETZPC_I2C6_ID, DECPROT_NS_RW, DECPROT_UNLOCK)
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DECPROT(STM32MP1_ETZPC_RNG1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)
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DECPROT(STM32MP1_ETZPC_HASH1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)
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DECPROT(STM32MP1_ETZPC_CRYP1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)
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DECPROT(STM32MP1_ETZPC_DDRCTRL_ID, DECPROT_NS_R_S_W, DECPROT_LOCK)
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DECPROT(STM32MP1_ETZPC_DDRPHYC_ID, DECPROT_NS_R_S_W, DECPROT_LOCK)
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DECPROT(STM32MP1_ETZPC_STGENC_ID, DECPROT_S_RW, DECPROT_LOCK)
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DECPROT(STM32MP1_ETZPC_BKPSRAM_ID, DECPROT_S_RW, DECPROT_LOCK)
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DECPROT(STM32MP1_ETZPC_IWDG1_ID, DECPROT_S_RW, DECPROT_LOCK)
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>;
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};
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&i2c4 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4_pins_z_mx>;
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i2c-scl-rising-time-ns = <185>;
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i2c-scl-falling-time-ns = <20>;
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clock-frequency = <400000>;
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status = "okay";
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secure-status = "okay";
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pmic: stpmic@33 {
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compatible = "st,stpmic1";
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reg = <0x33>;
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interrupts-extended = <&exti_pwr 55 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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status = "okay";
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secure-status = "okay";
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regulators {
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compatible = "st,stpmic1-regulators";
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buck1-supply = <&vin>;
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buck2-supply = <&vin>;
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buck3-supply = <&vin>;
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buck4-supply = <&vin>;
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ldo1-supply = <&v3v3>;
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ldo2-supply = <&vin>;
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ldo3-supply = <&vdd_ddr>;
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ldo4-supply = <&vin>;
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ldo5-supply = <&vin>;
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ldo6-supply = <&v3v3>;
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vref_ddr-supply = <&vin>;
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boost-supply = <&vin>;
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pwr_sw1-supply = <&bst_out>;
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pwr_sw2-supply = <&bst_out>;
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vddcore: buck1 {
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regulator-name = "vddcore";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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regulator-initial-mode = <0>;
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regulator-over-current-protection;
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lp-stop{
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1200000>;
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};
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standby-ddr-sr{
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regulator-off-in-suspend;
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};
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standby-ddr-off{
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regulator-off-in-suspend;
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};
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};
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vdd_ddr: buck2 {
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regulator-name = "vdd_ddr";
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regulator-min-microvolt = <1350000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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regulator-initial-mode = <0>;
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regulator-over-current-protection;
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lp-stop{
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regulator-suspend-microvolt = <1350000>;
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regulator-on-in-suspend;
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};
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standby-ddr-sr{
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regulator-suspend-microvolt = <1350000>;
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regulator-on-in-suspend;
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};
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standby-ddr-off{
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regulator-off-in-suspend;
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};
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};
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vdd: buck3 {
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regulator-name = "vdd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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st,mask-reset;
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regulator-initial-mode = <0>;
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regulator-over-current-protection;
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lp-stop{
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regulator-suspend-microvolt = <3300000>;
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regulator-on-in-suspend;
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};
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standby-ddr-sr{
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regulator-suspend-microvolt = <3300000>;
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regulator-on-in-suspend;
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};
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standby-ddr-off{
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regulator-suspend-microvolt = <3300000>;
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regulator-on-in-suspend;
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};
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};
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v3v3: buck4 {
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regulator-name = "v3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-over-current-protection;
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regulator-initial-mode = <0>;
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lp-stop{
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regulator-suspend-microvolt = <3300000>;
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regulator-on-in-suspend;
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};
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standby-ddr-sr{
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regulator-off-in-suspend;
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};
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standby-ddr-off{
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regulator-off-in-suspend;
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};
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};
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v1v8_ldo1: ldo1 {
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regulator-name = "v1v8_audio";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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standby-ddr-sr{
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regulator-off-in-suspend;
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};
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standby-ddr-off{
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regulator-off-in-suspend;
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};
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};
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v3v3_ldo2: ldo2 {
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regulator-name = "v3v3_hdmi";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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standby-ddr-sr{
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regulator-off-in-suspend;
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};
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standby-ddr-off{
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regulator-off-in-suspend;
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};
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};
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vtt_ddr: ldo3 {
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regulator-name = "vtt_ddr";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <750000>;
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regulator-always-on;
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regulator-over-current-protection;
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lp-stop{
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regulator-off-in-suspend;
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};
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standby-ddr-sr{
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regulator-off-in-suspend;
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};
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standby-ddr-off{
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regulator-off-in-suspend;
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};
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};
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vdd_usb: ldo4 {
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regulator-name = "vdd_usb";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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standby-ddr-sr{
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regulator-on-in-suspend;
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};
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standby-ddr-off{
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regulator-off-in-suspend;
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};
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};
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vdda: ldo5 {
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regulator-name = "vdda";
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regulator-min-microvolt = <2900000>;
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regulator-max-microvolt = <2900000>;
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regulator-boot-on;
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standby-ddr-sr{
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regulator-off-in-suspend;
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};
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standby-ddr-off{
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regulator-off-in-suspend;
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};
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};
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v1v2_ldo6: ldo6 {
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regulator-name = "v1v2_ldo6";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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standby-ddr-sr{
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regulator-off-in-suspend;
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};
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standby-ddr-off{
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regulator-off-in-suspend;
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};
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};
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vref_ddr: vref_ddr {
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regulator-name = "vref_ddr";
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regulator-always-on;
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regulator-over-current-protection;
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lp-stop{
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regulator-on-in-suspend;
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};
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standby-ddr-sr{
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regulator-on-in-suspend;
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};
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standby-ddr-off{
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regulator-off-in-suspend;
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};
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};
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bst_out: boost {
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regulator-name = "bst_out";
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};
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vbus_otg: pwr_sw1 {
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regulator-name = "vbus_otg";
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};
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vbus_sw: pwr_sw2 {
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regulator-name = "vbus_sw";
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regulator-active-discharge = <1>;
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};
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};
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};
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};
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&iwdg2 {
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timeout-sec = <32>;
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secure-timeout-sec = <5>;
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status = "okay";
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secure-status = "okay";
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};
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&nvmem_layout {
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nvmem-cells = <&cfg0_otp>,
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<&part_number_otp>,
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<&monotonic_otp>,
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<&nand_otp>,
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<&uid_otp>,
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<&package_otp>,
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<&hw2_otp>,
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<&pkh_otp>,
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<&board_id>;
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nvmem-cell-names = "cfg0_otp",
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"part_number_otp",
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"monotonic_otp",
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"nand_otp",
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"uid_otp",
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"package_otp",
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"hw2_otp",
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"pkh_otp",
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"board_id";
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};
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&pwr_regulators {
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system_suspend_supported_soc_modes = <
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STM32_PM_CSLEEP_RUN
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STM32_PM_CSTOP_ALLOW_LP_STOP
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STM32_PM_CSTOP_ALLOW_STANDBY_DDR_SR
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>;
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system_off_soc_mode = <STM32_PM_CSTOP_ALLOW_STANDBY_DDR_OFF>;
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vdd-supply = <&vdd>;
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vdd_3v3_usbfs-supply = <&vdd_usb>;
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};
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&rcc {
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st,hsi-cal;
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st,csi-cal;
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st,cal-sec = <60>;
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st,clksrc = <
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CLK_MPU_PLL1P
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CLK_AXI_PLL2P
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CLK_MCU_PLL3P
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CLK_PLL12_HSE
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CLK_PLL3_HSE
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CLK_PLL4_HSE
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CLK_RTC_LSE
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CLK_MCO1_DISABLED
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CLK_MCO2_DISABLED
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>;
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st,clkdiv = <
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1 /*MPU*/
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0 /*AXI*/
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0 /*MCU*/
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1 /*APB1*/
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1 /*APB2*/
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1 /*APB3*/
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1 /*APB4*/
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2 /*APB5*/
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23 /*RTC*/
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0 /*MCO1*/
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0 /*MCO2*/
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>;
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st,pkcs = <
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CLK_CKPER_HSE
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CLK_FMC_ACLK
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CLK_QSPI_ACLK
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CLK_ETH_DISABLED
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CLK_SDMMC12_PLL4P
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CLK_DSI_DSIPLL
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CLK_STGEN_HSE
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CLK_USBPHY_HSE
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CLK_SPI2S1_PLL3Q
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CLK_SPI2S23_PLL3Q
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CLK_SPI45_HSI
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CLK_SPI6_HSI
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CLK_I2C46_HSI
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CLK_SDMMC3_PLL4P
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CLK_USBO_USBPHY
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CLK_ADC_CKPER
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CLK_CEC_LSE
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CLK_I2C12_HSI
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CLK_I2C35_HSI
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CLK_UART1_HSI
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CLK_UART24_HSI
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CLK_UART35_HSI
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CLK_UART6_HSI
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CLK_UART78_HSI
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CLK_SPDIF_PLL4P
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CLK_FDCAN_PLL4R
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CLK_SAI1_PLL3Q
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CLK_SAI2_PLL3Q
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CLK_SAI3_PLL3Q
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CLK_SAI4_PLL3Q
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CLK_RNG1_LSI
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CLK_RNG2_LSI
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CLK_LPTIM1_PCLK1
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CLK_LPTIM23_PCLK3
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CLK_LPTIM45_LSE
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>;
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/* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
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pll2: st,pll@1 {
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compatible = "st,stm32mp1-pll";
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reg = <1>;
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cfg = <2 65 1 0 0 PQR(1,1,1)>;
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frac = <0x1400>;
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};
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/* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
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pll3: st,pll@2 {
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compatible = "st,stm32mp1-pll";
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reg = <2>;
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cfg = <1 33 1 16 36 PQR(1,1,1)>;
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frac = <0x1a04>;
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};
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/* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
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pll4: st,pll@3 {
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compatible = "st,stm32mp1-pll";
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reg = <3>;
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cfg = <3 98 5 7 7 PQR(1,1,1)>;
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};
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};
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&rng1 {
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status = "okay";
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secure-status = "okay";
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};
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&rtc {
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status = "okay";
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secure-status = "okay";
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};
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&sdmmc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc1_pins_mx>;
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disable-wp;
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st,neg-edge;
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bus-width = <4>;
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vmmc-supply = <&v3v3>;
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status = "okay";
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};
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&timers15 {
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secure-status = "okay";
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st,hsi-cal-input = <7>;
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st,csi-cal-input = <8>;
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};
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart4_pins_mx>;
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status = "okay";
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};
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&usbotg_hs {
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phys = <&usbphyc_port1 0>;
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phy-names = "usb2-phy";
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usb-role-switch;
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status = "okay";
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};
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&usbphyc {
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status = "okay";
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};
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&usbphyc_port0 {
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phy-supply = <&vdd_usb>;
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};
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&usbphyc_port1 {
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phy-supply = <&vdd_usb>;
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};
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&pinctrl {
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sdmmc1_pins_mx: sdmmc1-b4-0 {
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pins1 {
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pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
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<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
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<STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
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<STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
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<STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
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slew-rate = <1>;
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drive-push-pull;
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bias-disable;
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};
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pins2 {
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pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
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slew-rate = <2>;
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drive-push-pull;
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bias-disable;
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};
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};
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uart4_pins_mx: uart4-0 {
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pins1 {
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pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
|
|
bias-disable;
|
|
drive-push-pull;
|
|
slew-rate = <0>;
|
|
};
|
|
pins2 {
|
|
pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pinctrl_z {
|
|
i2c4_pins_z_mx: i2c4-0 {
|
|
pins {
|
|
pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
|
|
<STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
|
|
bias-disable;
|
|
drive-open-drain;
|
|
slew-rate = <0>;
|
|
};
|
|
};
|
|
};
|