48 lines
1.4 KiB
C
48 lines
1.4 KiB
C
/* { dg-do compile } */
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/* { dg-require-effective-target powerpc_vsx_ok } */
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/* { dg-options "-O2 -fdump-tree-fre-all -mvsx" } */
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/* Verify we remove a redundant load that occurs both before and after
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we call a vector load builtin.
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This testcase is introduced as we updated a number of our vector load
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built-ins with the attribute of PURE instead of MEM, to indicate that
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those builtins only read from memory, versus reading from and writing
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to the same.
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This means we can identify the redundant load instructions in an earlier
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pass, and optimize them away. */
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#include <altivec.h>
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vector signed short load_data;
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vector signed short foo()
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{
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vector signed short r11,r12,r13;
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r11 = load_data;
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r12 = vec_xl (0, &load_data[0]);
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r13 = load_data;
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return (r11 + r12 + r13);
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}
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vector signed short biz()
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{
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vector signed short r21,r22,r23;
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r21 = load_data;
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r22 = vec_lvehx (0, &load_data[0]);
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r23 = load_data;
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return (r21 + r22 + r23);
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}
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vector signed short bar()
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{
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vector signed short r31,r32,r33;
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r31 = load_data;
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r32 = vec_lvx (0, &load_data[0]);
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r33 = load_data;
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return (r31 + r32 + r33);
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}
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/* { dg-final { scan-tree-dump-times "Removing dead stmt r13_. = load_data;" 1 "fre1" } } */
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/* { dg-final { scan-tree-dump-times "Removing dead stmt r23_. = load_data;" 1 "fre1" } } */
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/* { dg-final { scan-tree-dump-times "Removing dead stmt r33_. = load_data;" 1 "fre1" } } */
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