32 lines
728 B
C
32 lines
728 B
C
/* Test for ICE arising from VSX code generation. */
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/* { dg-do compile } */
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/* { dg-options "-O3 -mdejagnu-cpu=power7 -funroll-loops" } */
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/* { dg-require-effective-target powerpc_vsx_ok } */
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int sourcenode;
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int ARCHelems;
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int *source_elms;
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void vv12x12 (double *, double *, double *);
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void
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foo (int argc, char **argv)
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{
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int i, j;
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int cor[4];
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double Ke[12][12], Me[12], Ce[12], Mexv[12], Cexv[12], v[12];
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for (i = 0; i < ARCHelems; i++)
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{
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for (j = 0; j < 12; j++)
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Me[j] = 0.0;
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if (cor[j] == sourcenode)
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vv12x12 (Me, v, Mexv);
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vv12x12 (Ce, v, Cexv);
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if (source_elms[i] == 3)
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for (j = 0; j < 12; j++)
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{
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v[j] = -v[j];
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Mexv[j] = -Mexv[j];
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Cexv[j] = -Cexv[j];
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}
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}
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}
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