53 lines
1.3 KiB
C
53 lines
1.3 KiB
C
/* We have encountered an issue that a "mov_s.ne" instruction *
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* with an immediate value was put in the delay slot of a *
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* branch: *
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* *
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* bne.d @.L1 # 33 [c=20 l=4] *branch_insn *
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* mov_s.ne r0,7 # 35 [c=0 l=6] *movsi_ne/2 *
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* *
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* This is not sanctioned and must not happen. The test below *
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* is a reduced version of the source code leading to the *
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* problem. */
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/* { dg-do compile } */
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/* { dg-skip-if "" { ! { clmcpu } } } */
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/* { dg-options "-mcpu=archs -Og" } */
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typedef struct
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{
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struct
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{
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int length;
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} table;
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} room;
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struct house
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{
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room *r;
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};
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int glob;
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_Bool bar();
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int func(struct house *h, int i, int whatever)
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{
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for (;;)
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{
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_Bool a;
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if (h && h->r[i].table.length == glob)
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{
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if (whatever)
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{
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a = bar();
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if (__builtin_expect(!a, 0))
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return 7;
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}
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break;
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}
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}
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return 0;
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}
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/* no 'mov_s.ne r,limm' in a delay slot */
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/* { dg-final { scan-assembler-not "bne.d\.*\n\\s\+mov_s.ne\\s+r\[0-9\]+,7" } } */
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