59 lines
1.6 KiB
C
59 lines
1.6 KiB
C
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/* PR81833: This used to fail due to improper implementation of vec_msum. */
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/* Test case relies on -mcpu=power7 or later. Currently we don't have
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machinery to express that, so we have two separate tests for -mcpu=power7
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and -mcpu=power8 to catch 32-bit BE on P7 and 64-bit BE/LE on P8. */
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/* { dg-do run } */
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/* { dg-require-effective-target p8vector_hw } */
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/* { dg-options "-mdejagnu-cpu=power8 -O2" } */
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#include <altivec.h>
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#define vec_u8 vector unsigned char
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#define vec_s8 vector signed char
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#define vec_u16 vector unsigned short
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#define vec_s16 vector signed short
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#define vec_u32 vector unsigned int
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#define vec_s32 vector signed int
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#define vec_f vector float
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#define LOAD_ZERO const vec_u8 zerov = vec_splat_u8 (0)
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#define zero_u8v (vec_u8) zerov
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#define zero_s8v (vec_s8) zerov
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#define zero_u16v (vec_u16) zerov
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#define zero_s16v (vec_s16) zerov
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#define zero_u32v (vec_u32) zerov
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#define zero_s32v (vec_s32) zerov
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signed int __attribute__((noinline))
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scalarproduct_int16_vsx (const signed short *v1, const signed short *v2,
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int order)
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{
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int i;
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LOAD_ZERO;
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register vec_s16 vec1;
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register vec_s32 res = vec_splat_s32 (0), t;
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signed int ires;
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for (i = 0; i < order; i += 8) {
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vec1 = vec_vsx_ld (0, v1);
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t = vec_msum (vec1, vec_vsx_ld (0, v2), zero_s32v);
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res = vec_sums (t, res);
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v1 += 8;
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v2 += 8;
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}
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res = vec_splat (res, 3);
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vec_ste (res, 0, &ires);
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return ires;
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}
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int main(void)
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{
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const signed short test_vec[] = { 1, 1, 1, 1, 1, 1, 1, 1 };
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if (scalarproduct_int16_vsx (test_vec, test_vec, 8) != 8)
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__builtin_abort ();
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return 0;
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}
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