22 lines
580 B
C
22 lines
580 B
C
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/* Ensure that explicit zero-entend instructions are present when compiling
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for targets without sram-ecc enabled (in which sub-dword loads do not
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zero the high bits of the target register). */
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/* { dg-do compile } */
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/* { dg-options "-O2 -ftree-vectorize -dp -msram-ecc=off" } */
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typedef unsigned int v64si __attribute__ ((vector_size (64*4)));
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typedef unsigned char v64qi __attribute__ ((vector_size (64*1)));
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extern v64si a;
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extern v64qi b;
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void
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f ()
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{
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for (int n = 0; n < 64; n++)
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a[n] = b[n];
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}
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/* { dg-final { scan-assembler "zero_extendv64qiv64si2" } } */
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