374 lines
11 KiB
Markdown
374 lines
11 KiB
Markdown
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;; Predicate definitions for code generation on the EPIPHANY cpu.
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;; Copyright (C) 1994-2021 Free Software Foundation, Inc.
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;; Contributed by Embecosm on behalf of Adapteva, Inc.
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;;
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;; This file is part of GCC.
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 3, or (at your option)
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;; any later version.
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;; GNU General Public License for more details.
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3. If not see
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;; <http://www.gnu.org/licenses/>.
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;; Returns true iff OP is a symbol reference that is a valid operand
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;; in a jump or call instruction.
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(define_predicate "symbolic_operand"
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(match_code "symbol_ref,label_ref,const")
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{
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if (GET_CODE (op) == SYMBOL_REF)
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return (!epiphany_is_long_call_p (op)
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&& (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
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if (GET_CODE (op) == LABEL_REF)
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return true;
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if (GET_CODE (op) == CONST)
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{
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op = XEXP (op, 0);
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if (GET_CODE (op) != PLUS || !symbolic_operand (XEXP (op, 0), mode))
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return false;
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/* The idea here is that a 'small' constant offset should be OK.
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What exactly is considered 'small' is a bit arbitrary. */
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return satisfies_constraint_L (XEXP (op, 1));
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}
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gcc_unreachable ();
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})
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;; Acceptable arguments to the call insn.
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(define_predicate "call_address_operand"
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(ior (match_code "reg")
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(match_operand 0 "symbolic_operand")))
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(define_predicate "call_operand"
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(match_code "mem")
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{
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op = XEXP (op, 0);
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return call_address_operand (op, mode);
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})
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;; general purpose register.
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(define_predicate "gpr_operand"
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(match_code "reg,subreg")
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{
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int regno;
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if (!register_operand (op, mode))
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return 0;
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if (GET_CODE (op) == SUBREG)
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op = XEXP (op, 0);
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regno = REGNO (op);
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return regno >= FIRST_PSEUDO_REGISTER || regno <= 63;
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})
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(define_special_predicate "any_gpr_operand"
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(match_code "subreg,reg")
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{
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return gpr_operand (op, mode);
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})
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;; register suitable for integer add / sub operations; besides general purpose
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;; registers we allow fake hard registers that are eliminated to a real
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;; hard register via an offset.
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(define_predicate "add_reg_operand"
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(match_code "reg,subreg")
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{
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int regno;
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if (!register_operand (op, mode))
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return 0;
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if (GET_CODE (op) == SUBREG)
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op = XEXP (op, 0);
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regno = REGNO (op);
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return (regno >= FIRST_PSEUDO_REGISTER || regno <= 63
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|| regno == FRAME_POINTER_REGNUM
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|| regno == ARG_POINTER_REGNUM);
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})
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;; Also allows suitable constants
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(define_predicate "add_operand"
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(match_code "reg,subreg,const_int,symbol_ref,label_ref,const")
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{
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if (GET_CODE (op) == REG || GET_CODE (op) == SUBREG)
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return add_reg_operand (op, mode);
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return satisfies_constraint_L (op) || satisfies_constraint_CnL (op);
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})
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;; Ordinary 3rd operand for arithmetic operations
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(define_predicate "arith_operand"
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(match_code "reg,subreg,const_int,symbol_ref,label_ref,const")
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{
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if (GET_CODE (op) == REG || GET_CODE (op) == SUBREG)
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return register_operand (op, mode);
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return satisfies_constraint_L (op);
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})
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;; Constant integer 3rd operand for arithmetic operations
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(define_predicate "arith_int_operand"
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(match_code "const_int,symbol_ref,label_ref,const")
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{
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return satisfies_constraint_L (op);
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})
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;; Return true if OP is an acceptable argument for a single word move source.
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(define_predicate "move_src_operand"
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(match_code
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"symbol_ref,label_ref,const,const_int,const_double,reg,subreg,mem,unspec")
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{
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switch (GET_CODE (op))
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{
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case SYMBOL_REF :
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case LABEL_REF :
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case CONST :
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return 1;
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case CONST_INT :
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return immediate_operand (op, mode);
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case CONST_DOUBLE :
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/* SImode constants should always fit into a CONST_INT. Large
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unsigned 32-bit constants are represented as negative CONST_INTs. */
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gcc_assert (GET_MODE (op) != SImode);
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/* We can handle 32-bit floating point constants. */
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if (mode == SFmode)
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return GET_MODE (op) == SFmode;
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return 0;
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case REG :
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return op != frame_pointer_rtx && register_operand (op, mode);
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case SUBREG :
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/* (subreg (mem ...) ...) can occur here if the inner part was once a
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pseudo-reg and is now a stack slot. */
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if (GET_CODE (SUBREG_REG (op)) == MEM)
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return address_operand (XEXP (SUBREG_REG (op), 0), mode);
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else
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return register_operand (op, mode);
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case MEM :
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return address_operand (XEXP (op, 0), mode);
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case UNSPEC:
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return satisfies_constraint_Sra (op);
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default :
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return 0;
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}
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})
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;; Return true if OP is an acceptable argument for a double word move source.
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(define_predicate "move_double_src_operand"
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(match_code "reg,subreg,mem,const_int,const_double,const_vector")
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{
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if (GET_CODE (op) == MEM && misaligned_operand (op, mode)
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&& !address_operand (plus_constant (Pmode, XEXP (op, 0), 4), SImode))
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return 0;
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return general_operand (op, mode);
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})
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;; Return true if OP is an acceptable argument for a move destination.
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(define_predicate "move_dest_operand"
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(match_code "reg,subreg,mem")
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{
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switch (GET_CODE (op))
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{
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case REG :
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return register_operand (op, mode);
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case SUBREG :
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/* (subreg (mem ...) ...) can occur here if the inner part was once a
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pseudo-reg and is now a stack slot. */
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if (GET_CODE (SUBREG_REG (op)) == MEM)
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{
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return address_operand (XEXP (SUBREG_REG (op), 0), mode);
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}
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else
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{
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return register_operand (op, mode);
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}
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case MEM :
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if (GET_MODE_SIZE (mode) == 8 && misaligned_operand (op, mode)
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&& !address_operand (plus_constant (Pmode, XEXP (op, 0), 4), SImode))
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return 0;
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return address_operand (XEXP (op, 0), mode);
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default :
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return 0;
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}
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})
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(define_special_predicate "stacktop_operand"
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(match_code "mem")
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{
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if (mode != VOIDmode && GET_MODE (op) != mode)
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return false;
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return rtx_equal_p (XEXP (op, 0), stack_pointer_rtx);
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})
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;; Return 1 if OP is a comparison operator valid for the mode of CC.
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;; This allows the use of MATCH_OPERATOR to recognize all the branch insns.
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;;
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;; Some insns only set a few bits in the condition code. So only allow those
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;; comparisons that use the bits that are valid.
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(define_predicate "proper_comparison_operator"
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(match_code "eq, ne, le, lt, ge, gt, leu, ltu, geu, gtu, unordered, ordered, uneq, unge, ungt, unle, unlt, ltgt")
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{
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enum rtx_code code = GET_CODE (op);
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rtx cc = XEXP (op, 0);
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/* combine can try strange things. */
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if (!REG_P (cc))
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return 0;
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switch (GET_MODE (cc))
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{
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case E_CC_Zmode:
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case E_CC_N_NEmode:
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case E_CC_FP_EQmode:
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return REGNO (cc) == CC_REGNUM && (code == EQ || code == NE);
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case E_CC_C_LTUmode:
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return REGNO (cc) == CC_REGNUM && (code == LTU || code == GEU);
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case E_CC_C_GTUmode:
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return REGNO (cc) == CC_REGNUM && (code == GTU || code == LEU);
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case E_CC_FPmode:
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return (REGNO (cc) == CCFP_REGNUM
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&& (code == EQ || code == NE || code == LT || code == LE));
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case E_CC_FP_GTEmode:
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return (REGNO (cc) == CC_REGNUM
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&& (code == EQ || code == NE || code == GT || code == GE
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|| code == UNLE || code == UNLT));
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case E_CC_FP_ORDmode:
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return REGNO (cc) == CC_REGNUM && (code == ORDERED || code == UNORDERED);
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case E_CC_FP_UNEQmode:
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return REGNO (cc) == CC_REGNUM && (code == UNEQ || code == LTGT);
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case E_CCmode:
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return REGNO (cc) == CC_REGNUM;
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/* From combiner. */
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case E_QImode: case E_SImode: case E_SFmode: case E_HImode:
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/* From cse.c:dead_libcall_p. */
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case E_DFmode:
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return 0;
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default:
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gcc_unreachable ();
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}
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})
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(define_predicate "addsub_operator"
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(match_code "plus, minus"))
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(define_predicate "cc_operand"
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(and (match_code "reg")
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(match_test "REGNO (op) == CC_REGNUM || REGNO (op) == CCFP_REGNUM")))
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(define_predicate "const0_operand"
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(match_code "const_int, const_double")
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{
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if (mode == VOIDmode)
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mode = GET_MODE (op);
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return op == CONST0_RTX (mode);
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})
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(define_predicate "const_float_1_operand"
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(match_code "const_double")
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{
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return op == CONST1_RTX (mode);
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})
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(define_predicate "cc_move_operand"
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(and (match_code "reg")
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(ior (match_test "REGNO (op) == CC_REGNUM")
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(match_test "gpr_operand (op, mode)"))))
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(define_predicate "float_operation"
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(match_code "parallel")
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{
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/* Most patterns start out with one SET and one CLOBBER, and gain a USE
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or two of FP_NEAREST_REGNUM / FP_TRUNCATE_REGNUM / FP_ANYFP_REGNUM
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after mode switching. The longer patterns are
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all beyond length 4, and before mode switching, end with a
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CLOBBER of CCFP_REGNUM. */
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int count = XVECLEN (op, 0);
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bool inserted = MACHINE_FUNCTION (cfun)->control_use_inserted;
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int i;
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if (count == 2
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/* Vector ashift has an extra use for the constant factor required to
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implement the shift as multiply. */
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|| (count == 3 && GET_CODE (XVECEXP (op, 0, 0)) == SET
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&& GET_CODE (XEXP (XVECEXP (op, 0, 0), 1)) == ASHIFT))
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return !inserted;
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/* combine / recog will pass any old garbage here before checking the
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rest of the insn. */
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if (count <= 3)
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return false;
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i = 1;
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if (count > 4)
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for (i = 2; i < count; i++)
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{
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rtx x = XVECEXP (op, 0, i);
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if (GET_CODE (x) == CLOBBER)
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{
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if (!REG_P (XEXP (x, 0)))
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return false;
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if (REGNO (XEXP (x, 0)) == CCFP_REGNUM)
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{
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if (count == i + 1)
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return !inserted;
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break;
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}
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/* Just an ordinary clobber, keep looking. */
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}
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else if (GET_CODE (x) == USE
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|| (GET_CODE (x) == SET && i == 2))
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continue;
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else
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return false;
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}
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if (count != i + 3 || !inserted)
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return false;
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for (i = i+1; i < count; i++)
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{
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rtx x = XVECEXP (op, 0, i);
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if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
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return false;
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x = XEXP (x, 0);
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if (!REG_P (x)
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|| (REGNO (x) != FP_NEAREST_REGNUM
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&& REGNO (x) != FP_TRUNCATE_REGNUM
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&& REGNO (x) != FP_ANYFP_REGNUM))
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return false;
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}
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return true;
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})
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(define_predicate "set_fp_mode_operand"
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(ior (match_test "gpr_operand (op, mode)")
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(and (match_code "const")
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(match_test "satisfies_constraint_Cfm (op)"))))
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(define_predicate "post_modify_address"
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(match_code "post_modify,post_inc,post_dec"))
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(define_predicate "post_modify_operand"
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(and (match_code "mem")
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(match_test "post_modify_address (XEXP (op, 0), Pmode)")))
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; used in the memory clobber of stack_adjust_str, allows addresses with
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; large offsets.
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(define_predicate "memclob_operand"
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||
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(match_code "mem"))
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||
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||
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(define_predicate "nonsymbolic_immediate_operand"
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||
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(ior (match_test "immediate_operand (op, mode)")
|
||
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(match_code "const_vector"))) /* Is this specific enough? */
|
||
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||
|
|
;; Return true if OP is misaligned memory operand
|
||
|
|
(define_predicate "misaligned_operand"
|
||
|
|
(and (match_code "mem")
|
||
|
|
(match_test "MEM_ALIGN (op) < GET_MODE_ALIGNMENT (mode)")))
|