119 lines
3.9 KiB
Markdown
119 lines
3.9 KiB
Markdown
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;; Constraint definitions for Altera Nios II.
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;; Copyright (C) 2012-2021 Free Software Foundation, Inc.
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;; Contributed by Chung-Lin Tang <cltang@codesourcery.com>
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 3, or (at your option)
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;; any later version.
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;;
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;; GNU General Public License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3. If not see
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;; <http://www.gnu.org/licenses/>.
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;; We use the following constraint letters for constants
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;;
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;; I: -32768 to 32767
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;; J: 0 to 65535
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;; K: $nnnn0000 for some nnnn
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;; P: Under R2, $nnnnffff or $ffffnnnn for some nnnn
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;; L: 0 to 31 (for shift counts)
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;; M: 0
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;; N: 0 to 255 (for custom instruction numbers)
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;; O: 0 to 31 (for control register numbers)
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;; U: -32768 to 32767 under R1, -2048 to 2047 under R2
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;;
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;; We use the following constraint letters for memory constraints
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;;
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;; v: memory operands for R2 load/store exclusive instructions
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;; w: memory operands for load/store IO and cache instructions
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;;
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;; We use the following built-in register classes:
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;;
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;; r: general purpose register (r0..r31)
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;; m: memory operand
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;;
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;; Plus, we define the following constraint strings:
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;;
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;; S: symbol that is in the "small data" area
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;; Register constraints
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(define_register_constraint "c" "IJMP_REGS"
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"A register suitable for an indirect jump.")
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(define_register_constraint "j" "SIB_REGS"
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"A register suitable for an indirect sibcall.")
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;; Integer constraints
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(define_constraint "I"
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"A signed 16-bit constant (for arithmetic instructions)."
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(and (match_code "const_int")
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(match_test "SMALL_INT (ival)")))
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(define_constraint "J"
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"An unsigned 16-bit constant (for logical instructions)."
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(and (match_code "const_int")
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(match_test "SMALL_INT_UNSIGNED (ival)")))
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(define_constraint "K"
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"An unsigned 16-bit high constant (for logical instructions)."
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(and (match_code "const_int")
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(match_test "UPPER16_INT (ival)")))
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(define_constraint "L"
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"An unsigned 5-bit constant (for shift counts)."
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(and (match_code "const_int")
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(match_test "ival >= 0 && ival <= 31")))
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(define_constraint "M"
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"Integer zero."
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(and (match_code "const_int")
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(match_test "ival == 0")))
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(define_constraint "N"
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"An unsigned 8-bit constant (for custom instruction codes)."
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(and (match_code "const_int")
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(match_test "ival >= 0 && ival <= 255")))
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(define_constraint "O"
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"An unsigned 5-bit constant (for control register numbers)."
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(and (match_code "const_int")
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(match_test "ival >= 0 && ival <= 31")))
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(define_constraint "P"
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"An immediate operand for R2 andchi/andci instructions."
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(and (match_code "const_int")
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(match_test "TARGET_ARCH_R2 && ANDCLEAR_INT (ival)")))
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(define_constraint "S"
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"An immediate stored in small data, accessible by GP, or by offset from r0."
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(match_test "gprel_constant_p (op) || r0rel_constant_p (op)"))
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(define_constraint "T"
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"A constant unspec offset representing a relocation."
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(match_test "nios2_unspec_reloc_p (op)"))
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(define_constraint "U"
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"A 12-bit or 16-bit constant (for RDPRS and DCACHE)."
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(and (match_code "const_int")
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(if_then_else (match_test "TARGET_ARCH_R2")
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(match_test "SMALL_INT12 (ival)")
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(match_test "SMALL_INT (ival)"))))
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(define_memory_constraint "v"
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"A memory operand suitable for R2 load/store exclusive instructions."
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(match_operand 0 "ldstex_memory_operand"))
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(define_memory_constraint "w"
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"A memory operand suitable for load/store IO and cache instructions."
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(match_operand 0 "ldstio_memory_operand"))
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