FPGA_module/clk/out

90 lines
2.7 KiB
Plaintext

#! /c/Source/iverilog-install/bin/vvp
:ivl_version "12.0 (devel)" "(s20150603-1539-g2693dd32b)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision - 12;
:vpi_module "E:\iverilog\lib\ivl\system.vpi";
:vpi_module "E:\iverilog\lib\ivl\vhdl_sys.vpi";
:vpi_module "E:\iverilog\lib\ivl\vhdl_textio.vpi";
:vpi_module "E:\iverilog\lib\ivl\v2005_math.vpi";
:vpi_module "E:\iverilog\lib\ivl\va_math.vpi";
S_0000029dbbc06940 .scope module, "clk_tb" "clk_tb" 2 4;
.timescale -9 -12;
v0000029dbbbbb840_0 .var "clk", 0 0;
o0000029dbbc07038 .functor BUFZ 1, C4<z>; HiZ drive
v0000029dbbbbb8e0_0 .net "rst", 0 0, o0000029dbbc07038; 0 drivers
v0000029dbbbbb980_0 .var "rst_n", 0 0;
S_0000029dbbc06ad0 .scope module, "tb_clk" "clk_test" 2 21, 3 1 0, S_0000029dbbc06940;
.timescale 0 0;
.port_info 0 /INPUT 1 "clk";
.port_info 1 /INPUT 1 "rst_n";
v0000029dbbbd32c0_0 .net "clk", 0 0, v0000029dbbbbb840_0; 1 drivers
v0000029dbbbd2bf0_0 .var "clk_out", 0 0;
v0000029dbbbd3090_0 .net "rst_n", 0 0, o0000029dbbc07038; alias, 0 drivers
E_0000029dbbbbd100/0 .event negedge, v0000029dbbbd3090_0;
E_0000029dbbbbd100/1 .event posedge, v0000029dbbbd32c0_0;
E_0000029dbbbbd100 .event/or E_0000029dbbbbd100/0, E_0000029dbbbbd100/1;
.scope S_0000029dbbc06ad0;
T_0 ;
%wait E_0000029dbbbbd100;
%load/vec4 v0000029dbbbd3090_0;
%nor/r;
%flag_set/vec4 8;
%jmp/0xz T_0.0, 8;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0000029dbbbd2bf0_0, 0;
%jmp T_0.1;
T_0.0 ;
%load/vec4 v0000029dbbbd2bf0_0;
%cmpi/e 0, 0, 1;
%jmp/0xz T_0.2, 4;
%pushi/vec4 1, 0, 1;
%assign/vec4 v0000029dbbbd2bf0_0, 0;
%jmp T_0.3;
T_0.2 ;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0000029dbbbd2bf0_0, 0;
T_0.3 ;
T_0.1 ;
%jmp T_0;
.thread T_0;
.scope S_0000029dbbc06940;
T_1 ;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000029dbbbbb840_0, 0, 1;
%end;
.thread T_1;
.scope S_0000029dbbc06940;
T_2 ;
%delay 5000, 0;
%load/vec4 v0000029dbbbbb840_0;
%inv;
%store/vec4 v0000029dbbbbb840_0, 0, 1;
%jmp T_2;
.thread T_2;
.scope S_0000029dbbc06940;
T_3 ;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000029dbbbbb980_0, 0, 1;
%delay 10000, 0;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000029dbbbbb980_0, 0, 1;
%delay 10000, 0;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000029dbbbbb980_0, 0, 1;
%end;
.thread T_3;
.scope S_0000029dbbc06940;
T_4 ;
%vpi_call 2 27 "$dumpfile", "clk_tb.vcd" {0 0 0};
%vpi_call 2 28 "$dumpvars", 32'sb00000000000000000000000000000000, S_0000029dbbc06940 {0 0 0};
%delay 1000000, 0;
%vpi_call 2 29 "$finish" {0 0 0};
%end;
.thread T_4;
# The file index is used to find the file name in the following table.
:file_names 4;
"N/A";
"<interactive>";
"clk_tb.v";
"clk_test.v";