This commit is contained in:
chenyf 2024-07-01 08:40:53 +08:00
parent d71f64899d
commit 90713ac42a
3 changed files with 8 additions and 4 deletions

3
.gitmodules vendored Normal file
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@ -0,0 +1,3 @@
[submodule "fpga2"]
path = fpga2
url = http://chenyf123.top:1030/FPGA_util/fpga2.git

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@ -15,11 +15,11 @@
#else
#define FIRMWARE_TARGET_STR "release"
#endif
#define FIRMWARE_VER_REV 4
#define FIRMWARE_VER_REV_STR "4"
#define FIRMWARE_VER_REV 5
#define FIRMWARE_VER_REV_STR "5"
#define FIRMWARE_VER_HASH_STR "698c62f0"
#define FIRMWARE_VER_MULTI "M"
#define FIRMWARE_BUILD_INFO "r"FIRMWARE_VER_REV_STR"-"FIRMWARE_VER_HASH_STR"-"FIRMWARE_VER_MULTI" "FIRMWARE_TARGET_STR" "" built on "__DATE__" "__TIME__
#define FIRMWARE_VER_MULTI ""
#define FIRMWARE_BUILD_INFO "r"FIRMWARE_VER_REV_STR"-"FIRMWARE_VER_HASH_STR" "FIRMWARE_TARGET_STR" "" built on "__DATE__" "__TIME__
#define FIRMWARE_SUBMODULE_REV \
"\
"

1
fpga2 Submodule

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Subproject commit 0cdca8460daa2167a6d49f247034f2c8cb888c6d