fix: 2
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d71f64899d
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[submodule "fpga2"]
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path = fpga2
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url = http://chenyf123.top:1030/FPGA_util/fpga2.git
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@ -15,11 +15,11 @@
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#else
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#define FIRMWARE_TARGET_STR "release"
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#endif
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#define FIRMWARE_VER_REV 4
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#define FIRMWARE_VER_REV_STR "4"
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#define FIRMWARE_VER_REV 5
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#define FIRMWARE_VER_REV_STR "5"
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#define FIRMWARE_VER_HASH_STR "698c62f0"
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#define FIRMWARE_VER_MULTI "M"
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#define FIRMWARE_BUILD_INFO "r"FIRMWARE_VER_REV_STR"-"FIRMWARE_VER_HASH_STR"-"FIRMWARE_VER_MULTI" "FIRMWARE_TARGET_STR" "" built on "__DATE__" "__TIME__
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#define FIRMWARE_VER_MULTI ""
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#define FIRMWARE_BUILD_INFO "r"FIRMWARE_VER_REV_STR"-"FIRMWARE_VER_HASH_STR" "FIRMWARE_TARGET_STR" "" built on "__DATE__" "__TIME__
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#define FIRMWARE_SUBMODULE_REV \
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"\
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"
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@ -0,0 +1 @@
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Subproject commit 0cdca8460daa2167a6d49f247034f2c8cb888c6d
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