FPGA_module/uart/par/db/excute.smp_dump.txt

13 lines
312 B
Plaintext
Raw Normal View History

2024-08-04 06:24:44 +00:00
State Machine - |uart_top|uart_rx:uart_rx_c0|state
Name state.STOP state.DATA state.IDLE
state.IDLE 0 0 0
state.STOP 1 0 1
state.DATA 0 1 1
State Machine - |uart_top|uart_tx:uart_tx_c0|state
Name state.STA_OFF state.STA_DATA state.STA_IDLE
state.STA_OFF 0 0 0
state.STA_IDLE 1 0 1
state.STA_DATA 1 1 0